anv: Identify code paths specific to graphics primitive pipeline

In preparation for adding support for the graphics mesh pipeline,
identify all the paths that are specific the primitive pipeline.

This shouldn't change any behavior since the code currently only
supports the primitive pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13047>

src/intel/vulkan/anv_pipeline.c

@@ -1371,6 +1371,7 @@ anv_pipeline_init_from_cached_graphics(struct anv_graphics_pipeline *pipeline)
 {
    /* TODO: Cache this pipeline-wide information. */
 
+   if (anv_pipeline_is_primitive(pipeline)) {
       /* Primitive replication depends on information from all the shaders.
        * Recover this bit from the fact that we have more than one position slot
        * in the vertex shader when using it.
@@ -1385,6 +1386,7 @@ anv_pipeline_init_from_cached_graphics(struct anv_graphics_pipeline *pipeline)
             pos_slots++;
       }
       pipeline->use_primitive_replication = pos_slots > 1;
+   }
 }
 
 static VkResult
@@ -2403,10 +2405,9 @@ anv_graphics_pipeline_init(struct anv_graphics_pipeline *pipeline,
       return result;
    }
 
-   assert(pipeline->shaders[MESA_SHADER_VERTEX]);
-
    anv_pipeline_setup_l3_config(&pipeline->base, false);
 
+   if (anv_pipeline_is_primitive(pipeline)) {
       const VkPipelineVertexInputStateCreateInfo *vi_info =
          pCreateInfo->pVertexInputState;
 
@@ -2476,6 +2477,7 @@ anv_graphics_pipeline_init(struct anv_graphics_pipeline *pipeline,
          pipeline->topology = _3DPRIM_PATCHLIST(tess_info->patchControlPoints);
       else
          pipeline->topology = vk_to_intel_primitive_type[ia_info->topology];
+   }
 
    /* If rasterization is not enabled, ms_info must be ignored. */
    const bool raster_enabled =

src/intel/vulkan/anv_private.h

@@ -3697,6 +3697,12 @@ anv_pipeline_has_stage(const struct anv_graphics_pipeline *pipeline,
    return (pipeline->active_stages & mesa_to_vk_shader_stage(stage)) != 0;
 }
 
+static inline bool
+anv_pipeline_is_primitive(const struct anv_graphics_pipeline *pipeline)
+{
+   return anv_pipeline_has_stage(pipeline, MESA_SHADER_VERTEX);
+}
+
 #define ANV_DECL_GET_GRAPHICS_PROG_DATA_FUNC(prefix, stage)             \
 static inline const struct brw_##prefix##_prog_data *                   \
 get_##prefix##_prog_data(const struct anv_graphics_pipeline *pipeline)  \

src/intel/vulkan/genX_cmd_buffer.c

@@ -2494,6 +2494,8 @@ void genX(CmdPipelineBarrier)(
 static void
 cmd_buffer_alloc_push_constants(struct anv_cmd_buffer *cmd_buffer)
 {
+   assert(anv_pipeline_is_primitive(cmd_buffer->state.gfx.pipeline));
+
    VkShaderStageFlags stages =
       cmd_buffer->state.gfx.pipeline->active_stages;
 
@@ -3487,6 +3489,7 @@ cmd_buffer_emit_clip(struct anv_cmd_buffer *cmd_buffer)
    uint32_t dwords[GENX(3DSTATE_CLIP_length)];
 
    struct anv_graphics_pipeline *pipeline = cmd_buffer->state.gfx.pipeline;
+   if (anv_pipeline_is_primitive(pipeline)) {
       const struct brw_vue_prog_data *last =
          anv_pipeline_get_last_vue_prog_data(pipeline);
       if (last->vue_map.slots_valid & VARYING_BIT_VIEWPORT) {
@@ -3494,6 +3497,7 @@ cmd_buffer_emit_clip(struct anv_cmd_buffer *cmd_buffer)
             cmd_buffer->state.gfx.dynamic.viewport.count > 0 ?
             cmd_buffer->state.gfx.dynamic.viewport.count - 1 : 0;
       }
+   }
 
    GENX(3DSTATE_CLIP_pack)(NULL, dwords, &clip);
    anv_batch_emit_merge(&cmd_buffer->batch, dwords,

src/intel/vulkan/genX_pipeline.c

@@ -340,9 +340,6 @@ emit_3dstate_sbe(struct anv_graphics_pipeline *pipeline)
       return;
    }
 
-   const struct brw_vue_map *fs_input_map =
-      &anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map;
-
    struct GENX(3DSTATE_SBE) sbe = {
       GENX(3DSTATE_SBE_header),
       .AttributeSwizzleEnable = true,
@@ -365,6 +362,10 @@ emit_3dstate_sbe(struct anv_graphics_pipeline *pipeline)
 #  define swiz sbe
 #endif
 
+   if (anv_pipeline_is_primitive(pipeline)) {
+      const struct brw_vue_map *fs_input_map =
+         &anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map;
+
       int first_slot = brw_compute_first_urb_slot_required(wm_prog_data->inputs,
                                                            fs_input_map);
       assert(first_slot % 2 == 0);
@@ -431,6 +432,7 @@ emit_3dstate_sbe(struct anv_graphics_pipeline *pipeline)
       sbe.ForceVertexURBEntryReadOffset = true;
       sbe.ForceVertexURBEntryReadLength = true;
 #endif
+   }
 
    uint32_t *dw = anv_batch_emit_dwords(&pipeline->base.batch,
                                         GENX(3DSTATE_SBE_length));
@@ -676,6 +678,7 @@ emit_rs_state(struct anv_graphics_pipeline *pipeline,
    sf.DerefBlockSize = urb_deref_block_size;
 #endif
 
+   if (anv_pipeline_is_primitive(pipeline)) {
       const struct brw_vue_prog_data *last_vue_prog_data =
          anv_pipeline_get_last_vue_prog_data(pipeline);
 
@@ -685,6 +688,7 @@ emit_rs_state(struct anv_graphics_pipeline *pipeline,
          sf.PointWidthSource = State;
          sf.PointWidth = 1.0;
       }
+   }
 
 #if GFX_VER >= 8
    struct GENX(3DSTATE_RASTER) raster = {
@@ -1457,6 +1461,7 @@ emit_3dstate_clip(struct anv_graphics_pipeline *pipeline,
    clip.MinimumPointWidth = 0.125;
    clip.MaximumPointWidth = 255.875;
 
+   if (anv_pipeline_is_primitive(pipeline)) {
       const struct brw_vue_prog_data *last =
          anv_pipeline_get_last_vue_prog_data(pipeline);
 
@@ -1482,12 +1487,16 @@ emit_3dstate_clip(struct anv_graphics_pipeline *pipeline,
       clip.ForceZeroRTAIndexEnable =
          !(last->vue_map.slots_valid & VARYING_BIT_LAYER);
 
+#if GFX_VER == 7
+      clip.UserClipDistanceClipTestEnableBitmask = last->clip_distance_mask;
+      clip.UserClipDistanceCullTestEnableBitmask = last->cull_distance_mask;
+#endif
+   }
+
 #if GFX_VER == 7
    clip.FrontWinding            = genX(vk_to_intel_front_face)[rs_info->frontFace];
    clip.CullMode                = genX(vk_to_intel_cullmode)[rs_info->cullMode];
    clip.ViewportZClipTestEnable = pipeline->depth_clip_enable;
-   clip.UserClipDistanceClipTestEnableBitmask = last->clip_distance_mask;
-   clip.UserClipDistanceCullTestEnableBitmask = last->cull_distance_mask;
 #else
    clip.NonPerspectiveBarycentricEnable = wm_prog_data ?
       (wm_prog_data->barycentric_interp_modes &
@@ -2552,6 +2561,7 @@ genX(graphics_pipeline_create)(
       gfx7_emit_vs_workaround_flush(brw);
 #endif
 
+   if (anv_pipeline_is_primitive(pipeline)) {
       assert(pCreateInfo->pVertexInputState);
       emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
 
@@ -2568,6 +2578,7 @@ genX(graphics_pipeline_create)(
 
       emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState,
                              dynamic_states);
+   }
 
    emit_3dstate_sbe(pipeline);
    emit_3dstate_wm(pipeline, subpass,