From 1a0d3504d534bb37cdc3941a235cb3093154d7d0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Wed, 20 Sep 2023 13:02:46 -0700 Subject: [PATCH] anv: Fill PAT fields in Xe KMD gem_create and vm_bind uAPIs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Unlike i915, Xe KMD needs the cache parameter in gem_create then during vm bind it request the PAT index that matches previous parameter. The PAT index selected could have more memory caracteristics that KMD don't need to know. Signed-off-by: José Roberto de Souza Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/xe/anv_kmd_backend.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/intel/vulkan/xe/anv_kmd_backend.c b/src/intel/vulkan/xe/anv_kmd_backend.c index 2d48e291ea4..c986e726bcd 100644 --- a/src/intel/vulkan/xe/anv_kmd_backend.c +++ b/src/intel/vulkan/xe/anv_kmd_backend.c @@ -65,6 +65,20 @@ xe_gem_create(struct anv_device *device, for (uint16_t i = 0; i < regions_count; i++) gem_create.flags |= BITFIELD_BIT(regions[i]->instance); + const struct intel_device_info_pat_entry *pat_entry = + anv_device_get_pat_entry(device, alloc_flags); + switch (pat_entry->mmap) { + case INTEL_DEVICE_INFO_MMAP_MODE_WC: + gem_create.cpu_caching = DRM_XE_GEM_CPU_CACHING_WC; + break; + case INTEL_DEVICE_INFO_MMAP_MODE_WB: + gem_create.cpu_caching = DRM_XE_GEM_CPU_CACHING_WB; + break; + default: + unreachable("missing"); + gem_create.cpu_caching = DRM_XE_GEM_CPU_CACHING_WC; + } + if (intel_ioctl(device->fd, DRM_IOCTL_XE_GEM_CREATE, &gem_create)) return 0; @@ -137,6 +151,7 @@ xe_vm_bind_op(struct anv_device *device, .op = DRM_XE_VM_BIND_OP_UNMAP, .flags = 0, .prefetch_mem_region_instance = 0, + .pat_index = anv_device_get_pat_entry(device, bo->alloc_flags)->index, }; if (bind->op == ANV_VM_BIND) {