radv: gather layer in the shader info pass
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
@@ -2788,10 +2788,6 @@ handle_vs_outputs_post(struct radv_shader_context *ctx,
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sizeof(outinfo->vs_output_param_offset));
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sizeof(outinfo->vs_output_param_offset));
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outinfo->pos_exports = 0;
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outinfo->pos_exports = 0;
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if (ctx->output_mask & (1ull << VARYING_SLOT_LAYER)) {
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outinfo->writes_layer = true;
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}
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if (ctx->shader_info->so.num_outputs &&
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if (ctx->shader_info->so.num_outputs &&
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!ctx->is_gs_copy_shader) {
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!ctx->is_gs_copy_shader) {
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/* The GS copy shader emission already emits streamout. */
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/* The GS copy shader emission already emits streamout. */
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@@ -3506,10 +3502,6 @@ static void gfx10_ngg_gs_emit_epilogue_2(struct radv_shader_context *ctx)
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tmp = LLVMBuildZExt(builder, tmp, ctx->ac.i32, "");
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tmp = LLVMBuildZExt(builder, tmp, ctx->ac.i32, "");
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const LLVMValueRef vertexptr = ngg_gs_vertex_ptr(ctx, tmp);
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const LLVMValueRef vertexptr = ngg_gs_vertex_ptr(ctx, tmp);
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if (ctx->output_mask & (1ull << VARYING_SLOT_LAYER)) {
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outinfo->writes_layer = true;
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}
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unsigned out_idx = 0;
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unsigned out_idx = 0;
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gep_idx[1] = ctx->ac.i32_0;
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gep_idx[1] = ctx->ac.i32_0;
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for (unsigned i = 0; i < AC_LLVM_MAX_OUTPUTS; ++i) {
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for (unsigned i = 0; i < AC_LLVM_MAX_OUTPUTS; ++i) {
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@@ -3544,8 +3536,6 @@ static void gfx10_ngg_gs_emit_epilogue_2(struct radv_shader_context *ctx)
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/* Export ViewIndex. */
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/* Export ViewIndex. */
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if (export_view_index) {
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if (export_view_index) {
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outinfo->writes_layer = true;
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outputs[noutput].slot_name = VARYING_SLOT_LAYER;
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outputs[noutput].slot_name = VARYING_SLOT_LAYER;
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outputs[noutput].slot_index = 0;
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outputs[noutput].slot_index = 0;
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outputs[noutput].usage_mask = 0x1;
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outputs[noutput].usage_mask = 0x1;
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@@ -574,6 +574,9 @@ gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
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case VARYING_SLOT_VIEWPORT:
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case VARYING_SLOT_VIEWPORT:
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vs_info->writes_viewport_index = true;
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vs_info->writes_viewport_index = true;
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break;
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break;
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case VARYING_SLOT_LAYER:
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vs_info->writes_layer = true;
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break;
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default:
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default:
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break;
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break;
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}
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}
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@@ -667,6 +670,23 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
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}
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}
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}
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}
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/* Make sure to export the LayerID if the subpass has multiviews. */
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if (options->key.has_multiview_view_index) {
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switch (nir->info.stage) {
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case MESA_SHADER_VERTEX:
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info->vs.outinfo.writes_layer = true;
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break;
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case MESA_SHADER_TESS_EVAL:
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info->tes.outinfo.writes_layer = true;
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break;
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case MESA_SHADER_GEOMETRY:
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info->vs.outinfo.writes_layer = true;
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break;
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default:
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break;
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}
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}
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if (nir->info.stage == MESA_SHADER_FRAGMENT)
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if (nir->info.stage == MESA_SHADER_FRAGMENT)
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info->ps.num_interp = nir->num_inputs;
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info->ps.num_interp = nir->num_inputs;
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