From 178950bf9bc395755f83bbe67a15b9937403bf04 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Mon, 15 Jul 2024 07:55:08 -0700 Subject: [PATCH] anv: Fix return of PAT index for compressed bos for discrete GPUs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Jordan Justen Reviewed-by: Jianxun Zhang Signed-off-by: José Roberto de Souza Part-of: --- src/intel/vulkan/anv_device.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 1eeb31672a0..598a80a033c 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -5695,6 +5695,9 @@ anv_device_get_pat_entry(struct anv_device *device, if (alloc_flags & ANV_BO_ALLOC_IMPORTED) return &device->info->pat.cached_coherent; + if (alloc_flags & ANV_BO_ALLOC_COMPRESSED) + return &device->info->pat.compressed; + /* PAT indexes has no actual effect in DG2 and DG1, smem caches will always * be snopped by GPU and lmem will always be WC. * This might change in future discrete platforms. @@ -5705,9 +5708,8 @@ anv_device_get_pat_entry(struct anv_device *device, return &device->info->pat.writecombining; } - if (alloc_flags & ANV_BO_ALLOC_COMPRESSED) - return &device->info->pat.compressed; - else if ((alloc_flags & (ANV_BO_ALLOC_HOST_CACHED_COHERENT)) == ANV_BO_ALLOC_HOST_CACHED_COHERENT) + /* Integrated platforms handling only */ + if ((alloc_flags & (ANV_BO_ALLOC_HOST_CACHED_COHERENT)) == ANV_BO_ALLOC_HOST_CACHED_COHERENT) return &device->info->pat.cached_coherent; else if (alloc_flags & (ANV_BO_ALLOC_EXTERNAL | ANV_BO_ALLOC_SCANOUT)) return &device->info->pat.scanout;