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radv/meta: fix potential memleak when creating DCC retile pipelines

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If the driver needs to create two different DCC retile pipelines which
is based on the image swizzle, it will just overwrite the existing
layouts.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233>
This commit is contained in:
Samuel Pitoiset
2024-07-17 22:21:38 +02:00
committed by Marge Bot
parent 8e53114de3
commit 176befe439
1 changed files with 31 additions and 27 deletions
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58
src/amd/vulkan/meta/radv_meta_dcc_retile.c
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@@ -89,35 +89,39 @@ radv_device_init_meta_dcc_retile_state(struct radv_device *device, struct radeon
VkResult result = VK_SUCCESS;
nir_shader *cs = build_dcc_retile_compute_shader(device, surf);
const VkDescriptorSetLayoutBinding bindings[] = {
{
.binding = 0,
.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
.descriptorCount = 1,
if (!device->meta_state.dcc_retile.ds_layout) {
const VkDescriptorSetLayoutBinding bindings[] = {
{
.binding = 0,
.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
.descriptorCount = 1,
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
{
.binding = 1,
.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
.descriptorCount = 1,
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
};
result = radv_meta_create_descriptor_set_layout(device, 2, bindings, &device->meta_state.dcc_retile.ds_layout);
if (result != VK_SUCCESS)
goto cleanup;
}
if (!device->meta_state.dcc_retile.p_layout) {
const VkPushConstantRange pc_range = {
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
{
.binding = 1,
.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
.descriptorCount = 1,
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
.size = 16,
};
};
result = radv_meta_create_descriptor_set_layout(device, 2, bindings, &device->meta_state.dcc_retile.ds_layout);
if (result != VK_SUCCESS)
goto cleanup;
const VkPushConstantRange pc_range = {
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
.size = 16,
};
result = radv_meta_create_pipeline_layout(device, &device->meta_state.dcc_retile.ds_layout, 1, &pc_range,
&device->meta_state.dcc_retile.p_layout);
if (result != VK_SUCCESS)
goto cleanup;
result = radv_meta_create_pipeline_layout(device, &device->meta_state.dcc_retile.ds_layout, 1, &pc_range,
&device->meta_state.dcc_retile.p_layout);
if (result != VK_SUCCESS)
goto cleanup;
}
result = radv_meta_create_compute_pipeline(device, cs, device->meta_state.dcc_retile.p_layout,
&device->meta_state.dcc_retile.pipeline[surf->u.gfx9.swizzle_mode]);