pan/bi: Rework blend descriptor access handling
The current logic assumes blend descriptors are always retrieved from the blend descriptor slots present in the FAU RAM, but this assumption no longer stands when we add blend shaders to the mix. In that case we need to use an 'opaque blend' whose descriptor is passed through embedded constants. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>
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@@ -124,12 +124,6 @@ bi_assign_fau_idx_single(bi_registers *regs,
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if (!ins)
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return assigned;
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if (ins->type == BI_BLEND) {
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assert(!assigned);
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regs->fau_idx = 0x8;
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return true;
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}
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if (ins->type == BI_BRANCH && clause->branch_constant) {
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/* By convention branch constant is last */
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unsigned idx = clause->constant_count - 1;
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@@ -186,6 +180,18 @@ bi_assign_fau_idx_single(bi_registers *regs,
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assigned = true;
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} else if (ins->src[s] & BIR_INDEX_ZERO && fast_zero) {
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ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_STAGE;
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} else if (ins->src[s] & BIR_INDEX_BLEND) {
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unsigned rt = ins->blend_location;
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assert(rt <= 7);
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assert((ins->src[s] & ~BIR_SPECIAL) == BIFROST_SRC_FAU_HI ||
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(ins->src[s] & ~BIR_SPECIAL) == BIFROST_SRC_FAU_LO);
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ins->src[s] = BIR_INDEX_PASS | (ins->src[s] & ~BIR_SPECIAL);
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if (assigned && regs->fau_idx != (8 | rt))
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unreachable("Mismatched FAU index");
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regs->fau_idx = 8 | rt;
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assigned = true;
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} else if (s & BIR_INDEX_UNIFORM) {
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unreachable("Push uniforms not implemented yet");
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}
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@@ -158,8 +158,8 @@ bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
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pan_src_index(&instr->src[0]),
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BIR_INDEX_REGISTER | 60 /* Can this be arbitrary? */,
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/* Blend descriptor */
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BIR_INDEX_PASS | BIFROST_SRC_FAU_LO,
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BIR_INDEX_PASS | BIFROST_SRC_FAU_HI,
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BIR_INDEX_BLEND | BIFROST_SRC_FAU_LO,
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BIR_INDEX_BLEND | BIFROST_SRC_FAU_HI,
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},
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.src_types = {
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nir_intrinsic_src_type(instr),
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@@ -514,11 +514,13 @@ bi_remove_instruction(bi_instruction *ins)
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#define BIR_INDEX_CONSTANT (1 << 29)
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#define BIR_INDEX_ZERO (1 << 28)
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#define BIR_INDEX_PASS (1 << 27)
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#define BIR_INDEX_BLEND (1 << 26)
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/* Keep me synced please so we can check src & BIR_SPECIAL */
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#define BIR_SPECIAL ((BIR_INDEX_REGISTER | BIR_INDEX_UNIFORM) | \
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(BIR_INDEX_CONSTANT | BIR_INDEX_ZERO | BIR_INDEX_PASS))
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#define BIR_SPECIAL (BIR_INDEX_REGISTER | BIR_INDEX_UNIFORM | \
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BIR_INDEX_CONSTANT | BIR_INDEX_ZERO | \
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BIR_INDEX_PASS | BIR_INDEX_BLEND)
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static inline unsigned
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bi_max_temp(bi_context *ctx)
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