From 15f88ea46ed9b3d28d3d3c644cf3035748f8b7f8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 1 Jan 2024 18:01:40 -0500 Subject: [PATCH] radeonsi: rename *trivial_vs_prolog -> *trivial_vs_inputs This is a better name. Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_pipe.h | 4 ++-- src/gallium/drivers/radeonsi/si_state_draw.cpp | 12 ++++++------ .../drivers/radeonsi/si_state_shaders.cpp | 16 ++++++++-------- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index cc335d42880..361e3a88bfc 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -1122,8 +1122,8 @@ struct si_context { struct si_vertex_elements *vertex_elements; unsigned num_vertex_elements; unsigned cs_max_waves_per_sh; - bool uses_nontrivial_vs_prolog; - bool force_trivial_vs_prolog; + bool uses_nontrivial_vs_inputs; + bool force_trivial_vs_inputs; bool do_update_shaders; bool compute_shaderbuf_sgprs_dirty; bool compute_image_sgprs_dirty; diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp index 5eef4bcebb8..3af1b6c0854 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.cpp +++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp @@ -2132,21 +2132,21 @@ static void si_draw(struct pipe_context *ctx, * so disable any non-trivial VS prolog that is based on them, such as vertex * format lowering. */ - if (!sctx->force_trivial_vs_prolog) { - sctx->force_trivial_vs_prolog = true; + if (!sctx->force_trivial_vs_inputs) { + sctx->force_trivial_vs_inputs = true; /* Update shaders to disable the non-trivial VS prolog. */ - if (sctx->uses_nontrivial_vs_prolog) { + if (sctx->uses_nontrivial_vs_inputs) { si_vs_key_update_inputs(sctx); sctx->do_update_shaders = true; } } } else { - if (sctx->force_trivial_vs_prolog) { - sctx->force_trivial_vs_prolog = false; + if (sctx->force_trivial_vs_inputs) { + sctx->force_trivial_vs_inputs = false; /* Update shaders to enable the non-trivial VS prolog. */ - if (sctx->uses_nontrivial_vs_prolog) { + if (sctx->uses_nontrivial_vs_inputs) { si_vs_key_update_inputs(sctx); sctx->do_update_shaders = true; } diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp index 35138ae71b1..b0549aab025 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp +++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp @@ -2131,14 +2131,14 @@ void si_vs_key_update_inputs(struct si_context *sctx) if (vs->info.base.vs.blit_sgprs_amd) { si_clear_vs_key_inputs(sctx, key, &key->ge.part.vs.prolog); key->ge.opt.prefer_mono = 0; - sctx->uses_nontrivial_vs_prolog = false; + sctx->uses_nontrivial_vs_inputs = false; return; } - bool uses_nontrivial_vs_prolog = false; + bool uses_nontrivial_vs_inputs = false; if (elts->instance_divisor_is_one || elts->instance_divisor_is_fetched) - uses_nontrivial_vs_prolog = true; + uses_nontrivial_vs_inputs = true; key->ge.part.vs.prolog.instance_divisor_is_one = elts->instance_divisor_is_one; key->ge.part.vs.prolog.instance_divisor_is_fetched = elts->instance_divisor_is_fetched; @@ -2171,24 +2171,24 @@ void si_vs_key_update_inputs(struct si_context *sctx) key->ge.mono.vs_fix_fetch[i].bits = fix_fetch; if (fix_fetch) - uses_nontrivial_vs_prolog = true; + uses_nontrivial_vs_inputs = true; } key->ge.mono.vs_fetch_opencode = opencode; if (opencode) - uses_nontrivial_vs_prolog = true; + uses_nontrivial_vs_inputs = true; - sctx->uses_nontrivial_vs_prolog = uses_nontrivial_vs_prolog; + sctx->uses_nontrivial_vs_inputs = uses_nontrivial_vs_inputs; /* draw_vertex_state (display lists) requires a trivial VS prolog that ignores * the current vertex buffers and vertex elements. * - * We just computed the prolog key because we needed to set uses_nontrivial_vs_prolog, + * We just computed the prolog key because we needed to set uses_nontrivial_vs_inputs, * so that we know whether the VS prolog should be updated when we switch from * draw_vertex_state to draw_vbo. Now clear the VS prolog for draw_vertex_state. * This should happen rarely because the VS prolog should be trivial in most * cases. */ - if (uses_nontrivial_vs_prolog && sctx->force_trivial_vs_prolog) + if (uses_nontrivial_vs_inputs && sctx->force_trivial_vs_inputs) si_clear_vs_key_inputs(sctx, key, &key->ge.part.vs.prolog); }