radeonsi: rename *trivial_vs_prolog -> *trivial_vs_inputs
This is a better name. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
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@@ -1122,8 +1122,8 @@ struct si_context {
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struct si_vertex_elements *vertex_elements;
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unsigned num_vertex_elements;
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unsigned cs_max_waves_per_sh;
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bool uses_nontrivial_vs_prolog;
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bool force_trivial_vs_prolog;
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bool uses_nontrivial_vs_inputs;
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bool force_trivial_vs_inputs;
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bool do_update_shaders;
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bool compute_shaderbuf_sgprs_dirty;
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bool compute_image_sgprs_dirty;
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@@ -2132,21 +2132,21 @@ static void si_draw(struct pipe_context *ctx,
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* so disable any non-trivial VS prolog that is based on them, such as vertex
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* format lowering.
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*/
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if (!sctx->force_trivial_vs_prolog) {
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sctx->force_trivial_vs_prolog = true;
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if (!sctx->force_trivial_vs_inputs) {
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sctx->force_trivial_vs_inputs = true;
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/* Update shaders to disable the non-trivial VS prolog. */
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if (sctx->uses_nontrivial_vs_prolog) {
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if (sctx->uses_nontrivial_vs_inputs) {
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si_vs_key_update_inputs(sctx);
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sctx->do_update_shaders = true;
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}
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}
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} else {
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if (sctx->force_trivial_vs_prolog) {
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sctx->force_trivial_vs_prolog = false;
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if (sctx->force_trivial_vs_inputs) {
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sctx->force_trivial_vs_inputs = false;
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/* Update shaders to enable the non-trivial VS prolog. */
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if (sctx->uses_nontrivial_vs_prolog) {
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if (sctx->uses_nontrivial_vs_inputs) {
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si_vs_key_update_inputs(sctx);
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sctx->do_update_shaders = true;
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}
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@@ -2131,14 +2131,14 @@ void si_vs_key_update_inputs(struct si_context *sctx)
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if (vs->info.base.vs.blit_sgprs_amd) {
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si_clear_vs_key_inputs(sctx, key, &key->ge.part.vs.prolog);
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key->ge.opt.prefer_mono = 0;
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sctx->uses_nontrivial_vs_prolog = false;
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sctx->uses_nontrivial_vs_inputs = false;
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return;
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}
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bool uses_nontrivial_vs_prolog = false;
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bool uses_nontrivial_vs_inputs = false;
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if (elts->instance_divisor_is_one || elts->instance_divisor_is_fetched)
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uses_nontrivial_vs_prolog = true;
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uses_nontrivial_vs_inputs = true;
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key->ge.part.vs.prolog.instance_divisor_is_one = elts->instance_divisor_is_one;
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key->ge.part.vs.prolog.instance_divisor_is_fetched = elts->instance_divisor_is_fetched;
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@@ -2171,24 +2171,24 @@ void si_vs_key_update_inputs(struct si_context *sctx)
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key->ge.mono.vs_fix_fetch[i].bits = fix_fetch;
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if (fix_fetch)
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uses_nontrivial_vs_prolog = true;
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uses_nontrivial_vs_inputs = true;
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}
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key->ge.mono.vs_fetch_opencode = opencode;
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if (opencode)
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uses_nontrivial_vs_prolog = true;
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uses_nontrivial_vs_inputs = true;
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sctx->uses_nontrivial_vs_prolog = uses_nontrivial_vs_prolog;
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sctx->uses_nontrivial_vs_inputs = uses_nontrivial_vs_inputs;
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/* draw_vertex_state (display lists) requires a trivial VS prolog that ignores
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* the current vertex buffers and vertex elements.
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*
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* We just computed the prolog key because we needed to set uses_nontrivial_vs_prolog,
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* We just computed the prolog key because we needed to set uses_nontrivial_vs_inputs,
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* so that we know whether the VS prolog should be updated when we switch from
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* draw_vertex_state to draw_vbo. Now clear the VS prolog for draw_vertex_state.
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* This should happen rarely because the VS prolog should be trivial in most
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* cases.
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*/
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if (uses_nontrivial_vs_prolog && sctx->force_trivial_vs_prolog)
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if (uses_nontrivial_vs_inputs && sctx->force_trivial_vs_inputs)
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si_clear_vs_key_inputs(sctx, key, &key->ge.part.vs.prolog);
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}
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