intel/compiler: Lower find_lsb in NIR
No shader-db or fossil-db changes on any Intel platform. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>
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@@ -188,6 +188,7 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
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nir_options->lower_rotate = devinfo->ver < 11;
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nir_options->lower_bitfield_reverse = devinfo->ver < 7;
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nir_options->lower_find_lsb = devinfo->ver < 7;
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nir_options->has_iadd3 = devinfo->verx10 >= 125;
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nir_options->has_sdot_4x8 = devinfo->ver >= 12;
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@@ -1737,27 +1737,8 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
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case nir_op_find_lsb:
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assert(nir_dest_bit_size(instr->dest.dest) < 64);
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if (devinfo->ver < 7) {
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fs_reg temp = vgrf(glsl_type::int_type);
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/* (x & -x) generates a value that consists of only the LSB of x.
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* For all powers of 2, findMSB(y) == findLSB(y).
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*/
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fs_reg src = retype(op[0], BRW_REGISTER_TYPE_D);
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fs_reg negated_src = src;
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/* One must be negated, and the other must be non-negated. It
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* doesn't matter which is which.
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*/
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negated_src.negate = true;
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src.negate = false;
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bld.AND(temp, src, negated_src);
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emit_find_msb_using_lzd(bld, result, temp, false);
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} else {
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assert(devinfo->ver >= 7);
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bld.FBL(result, op[0]);
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}
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break;
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case nir_op_ubitfield_extract:
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@@ -1688,32 +1688,11 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
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break;
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}
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case nir_op_find_lsb: {
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case nir_op_find_lsb:
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assert(nir_dest_bit_size(instr->dest.dest) < 64);
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vec4_builder bld = vec4_builder(this).at_end();
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if (devinfo->ver < 7) {
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dst_reg temp = bld.vgrf(BRW_REGISTER_TYPE_D);
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/* (x & -x) generates a value that consists of only the LSB of x.
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* For all powers of 2, findMSB(y) == findLSB(y).
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*/
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src_reg src = src_reg(retype(op[0], BRW_REGISTER_TYPE_D));
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src_reg negated_src = src;
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/* One must be negated, and the other must be non-negated. It
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* doesn't matter which is which.
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*/
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negated_src.negate = true;
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src.negate = false;
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bld.AND(temp, src, negated_src);
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emit_find_msb_using_lzd(bld, dst, src_reg(temp), false);
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} else {
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bld.FBL(dst, op[0]);
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}
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assert(devinfo->ver >= 7);
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emit(FBL(dst, op[0]));
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break;
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}
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case nir_op_ubitfield_extract:
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case nir_op_ibitfield_extract:
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