i965: Add BRW_REGISTER_TYPE_DF.
Ivybridge, Baytrail, and Haswell support double float register types, but do not support them as immediate values. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
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@@ -990,6 +990,7 @@ operator|(brw_urb_write_flags x, brw_urb_write_flags y)
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#define BRW_HW_REG_NON_IMM_TYPE_UB 4
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#define BRW_HW_REG_NON_IMM_TYPE_UB 4
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#define BRW_HW_REG_NON_IMM_TYPE_B 5
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#define BRW_HW_REG_NON_IMM_TYPE_B 5
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#define GEN7_HW_REG_NON_IMM_TYPE_DF 6
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#define BRW_HW_REG_IMM_TYPE_UV 4 /* Gen6+ packed unsigned immediate vector */
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#define BRW_HW_REG_IMM_TYPE_UV 4 /* Gen6+ packed unsigned immediate vector */
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#define BRW_HW_REG_IMM_TYPE_VF 5 /* packed float immediate vector */
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#define BRW_HW_REG_IMM_TYPE_VF 5 /* packed float immediate vector */
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@@ -122,6 +122,7 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
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[BRW_REGISTER_TYPE_UV] = BRW_HW_REG_IMM_TYPE_UV,
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[BRW_REGISTER_TYPE_UV] = BRW_HW_REG_IMM_TYPE_UV,
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[BRW_REGISTER_TYPE_VF] = BRW_HW_REG_IMM_TYPE_VF,
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[BRW_REGISTER_TYPE_VF] = BRW_HW_REG_IMM_TYPE_VF,
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[BRW_REGISTER_TYPE_V] = BRW_HW_REG_IMM_TYPE_V,
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[BRW_REGISTER_TYPE_V] = BRW_HW_REG_IMM_TYPE_V,
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[BRW_REGISTER_TYPE_DF] = -1,
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};
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};
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assert(type < ARRAY_SIZE(imm_hw_types));
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assert(type < ARRAY_SIZE(imm_hw_types));
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assert(imm_hw_types[type] != -1);
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assert(imm_hw_types[type] != -1);
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@@ -139,9 +140,11 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
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[BRW_REGISTER_TYPE_UV] = -1,
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[BRW_REGISTER_TYPE_UV] = -1,
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[BRW_REGISTER_TYPE_VF] = -1,
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[BRW_REGISTER_TYPE_VF] = -1,
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[BRW_REGISTER_TYPE_V] = -1,
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[BRW_REGISTER_TYPE_V] = -1,
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[BRW_REGISTER_TYPE_DF] = GEN7_HW_REG_NON_IMM_TYPE_DF,
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};
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};
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assert(type < ARRAY_SIZE(hw_types));
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assert(type < ARRAY_SIZE(hw_types));
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assert(hw_types[type] != -1);
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assert(hw_types[type] != -1);
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assert(brw->gen >= 7 || type < BRW_REGISTER_TYPE_DF);
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return hw_types[type];
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return hw_types[type];
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}
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}
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}
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}
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@@ -105,6 +105,8 @@ enum brw_reg_type {
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BRW_REGISTER_TYPE_V,
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BRW_REGISTER_TYPE_V,
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BRW_REGISTER_TYPE_VF,
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BRW_REGISTER_TYPE_VF,
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/** @} */
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/** @} */
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BRW_REGISTER_TYPE_DF, /* Gen7+ (no immediates until Gen8+) */
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};
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};
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unsigned brw_reg_type_to_hw_type(const struct brw_context *brw,
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unsigned brw_reg_type_to_hw_type(const struct brw_context *brw,
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