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ac/radeonsi: add load_tess_coord() to the abi

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Timothy Arceri
2017-12-06 17:34:32 +11:00
parent eb1e555cfd
commit 14adf7853a
3 changed files with 42 additions and 24 deletions
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20
src/amd/common/ac_nir_to_llvm.c
View File

@@ -4147,9 +4147,11 @@ visit_end_primitive(struct nir_to_llvm_context *ctx,
}
static LLVMValueRef
visit_load_tess_coord(struct nir_to_llvm_context *ctx,
const nir_intrinsic_instr *instr)
load_tess_coord(struct ac_shader_abi *abi, LLVMTypeRef type,
unsigned num_components)
{
struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
LLVMValueRef coord[4] = {
ctx->tes_u,
ctx->tes_v,
@@ -4161,9 +4163,8 @@ visit_load_tess_coord(struct nir_to_llvm_context *ctx,
coord[2] = LLVMBuildFSub(ctx->builder, ctx->ac.f32_1,
LLVMBuildFAdd(ctx->builder, coord[0], coord[1], ""), "");
LLVMValueRef result = ac_build_gather_values(&ctx->ac, coord, instr->num_components);
return LLVMBuildBitCast(ctx->builder, result,
get_def_type(ctx->nir, &instr->dest.ssa), "");
LLVMValueRef result = ac_build_gather_values(&ctx->ac, coord, num_components);
return LLVMBuildBitCast(ctx->builder, result, type, "");
}
static void visit_intrinsic(struct ac_nir_context *ctx,
@@ -4352,9 +4353,13 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
case nir_intrinsic_end_primitive:
visit_end_primitive(ctx->nctx, instr);
break;
case nir_intrinsic_load_tess_coord:
result = visit_load_tess_coord(ctx->nctx, instr);
case nir_intrinsic_load_tess_coord: {
LLVMTypeRef type = ctx->nctx ?
get_def_type(ctx->nctx->nir, &instr->dest.ssa) :
NULL;
result = ctx->abi->load_tess_coord(ctx->abi, type, instr->num_components);
break;
}
case nir_intrinsic_load_patch_vertices_in:
result = LLVMConstInt(ctx->ac.i32, ctx->nctx->options->key.tcs.input_vertices, false);
break;
@@ -6686,6 +6691,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode;
ctx.abi.load_tess_inputs = load_tes_input;
ctx.abi.load_tess_coord = load_tess_coord;
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
if (shader_info->info.vs.needs_instance_id) {
ctx.shader_info->vs.vgpr_comp_cnt =

4
src/amd/common/ac_shader_abi.h
View File

@@ -99,6 +99,10 @@ struct ac_shader_abi {
bool is_compact,
unsigned writemask);
LLVMValueRef (*load_tess_coord)(struct ac_shader_abi *abi,
LLVMTypeRef type,
unsigned num_components);
LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
/**

42
src/gallium/drivers/radeonsi/si_shader.c
View File

@@ -1893,11 +1893,33 @@ static LLVMValueRef load_sample_position(struct si_shader_context *ctx, LLVMValu
return lp_build_gather_values(&ctx->gallivm, pos, 4);
}
static LLVMValueRef si_load_tess_coord(struct ac_shader_abi *abi,
LLVMTypeRef type,
unsigned num_components)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct lp_build_context *bld = &ctx->bld_base.base;
LLVMValueRef coord[4] = {
LLVMGetParam(ctx->main_fn, ctx->param_tes_u),
LLVMGetParam(ctx->main_fn, ctx->param_tes_v),
ctx->ac.f32_0,
ctx->ac.f32_0
};
/* For triangles, the vector should be (u, v, 1-u-v). */
if (ctx->shader->selector->info.properties[TGSI_PROPERTY_TES_PRIM_MODE] ==
PIPE_PRIM_TRIANGLES)
coord[2] = lp_build_sub(bld, ctx->ac.f32_1,
lp_build_add(bld, coord[0], coord[1]));
return lp_build_gather_values(&ctx->gallivm, coord, 4);
}
void si_load_system_value(struct si_shader_context *ctx,
unsigned index,
const struct tgsi_full_declaration *decl)
{
struct lp_build_context *bld = &ctx->bld_base.base;
LLVMValueRef value = 0;
assert(index < RADEON_LLVM_MAX_SYSTEM_VALUES);
@@ -1998,23 +2020,8 @@ void si_load_system_value(struct si_shader_context *ctx,
break;
case TGSI_SEMANTIC_TESSCOORD:
{
LLVMValueRef coord[4] = {
LLVMGetParam(ctx->main_fn, ctx->param_tes_u),
LLVMGetParam(ctx->main_fn, ctx->param_tes_v),
ctx->ac.f32_0,
ctx->ac.f32_0
};
/* For triangles, the vector should be (u, v, 1-u-v). */
if (ctx->shader->selector->info.properties[TGSI_PROPERTY_TES_PRIM_MODE] ==
PIPE_PRIM_TRIANGLES)
coord[2] = lp_build_sub(bld, ctx->ac.f32_1,
lp_build_add(bld, coord[0], coord[1]));
value = lp_build_gather_values(&ctx->gallivm, coord, 4);
value = si_load_tess_coord(&ctx->abi, NULL, 4);
break;
}
case TGSI_SEMANTIC_VERTICESIN:
if (ctx->type == PIPE_SHADER_TESS_CTRL)
@@ -5958,6 +5965,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
case PIPE_SHADER_TESS_EVAL:
bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tes;
ctx->abi.load_tess_inputs = si_nir_load_input_tes;
ctx->abi.load_tess_coord = si_load_tess_coord;
if (shader->key.as_es)
ctx->abi.emit_outputs = si_llvm_emit_es_epilogue;
else