freedreno/ir3: Drop wrmask for ir3 local and global store intrinsics
These intrinsics are supposed to map to the underlying hardware instructions, which don't have wrmask. We use them when we lower store_output in the geometry pipeline and since store_output gets lowered to temps, we always see full wrmasks there.
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committed by
Rob Clark

parent
4627bfcd69
commit
14969aab11
@@ -836,7 +836,7 @@ intrinsic("end_patch_ir3")
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# between geometry stages - perhaps it's explicit access to the vertex cache.
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# src[] = { value, offset }.
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store("shared_ir3", 2, [BASE, WRMASK, ALIGN_MUL, ALIGN_OFFSET])
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store("shared_ir3", 2, [BASE, ALIGN_MUL, ALIGN_OFFSET])
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# src[] = { offset }.
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load("shared_ir3", 1, [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
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@@ -846,7 +846,7 @@ load("shared_ir3", 1, [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
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# src[] = { value, address(vec2 of hi+lo uint32_t), offset }.
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# const_index[] = { write_mask, align_mul, align_offset }
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intrinsic("store_global_ir3", [0, 2, 1], indices=[WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
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intrinsic("store_global_ir3", [0, 2, 1], indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET])
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# src[] = { address(vec2 of hi+lo uint32_t), offset }.
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# const_index[] = { access, align_mul, align_offset }
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intrinsic("load_global_ir3", [2, 1], dest_comp=0, indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
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