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broadcom/compiler: fix incorrect ALU checks

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We had a bunch of cases where we would check ALU parameters without
first checking if the ALU op was valid.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22675>
This commit is contained in:
Iago Toral Quiroga
2023-04-25 09:04:25 +02:00
parent 65b40d0b7e
commit 148473eae4
2 changed files with 34 additions and 26 deletions
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30
src/broadcom/compiler/qpu_schedule.c
View File

@@ -136,12 +136,14 @@ qpu_inst_is_tlb(const struct v3d_qpu_instr *inst)
if (inst->type != V3D_QPU_INSTR_TYPE_ALU) if (inst->type != V3D_QPU_INSTR_TYPE_ALU)
return false; return false;
if (inst->alu.add.magic_write && if (inst->alu.add.op != V3D_QPU_A_NOP &&
inst->alu.add.magic_write &&
(inst->alu.add.waddr == V3D_QPU_WADDR_TLB || (inst->alu.add.waddr == V3D_QPU_WADDR_TLB ||
inst->alu.add.waddr == V3D_QPU_WADDR_TLBU)) inst->alu.add.waddr == V3D_QPU_WADDR_TLBU))
return true; return true;
if (inst->alu.mul.magic_write && if (inst->alu.mul.op != V3D_QPU_M_NOP &&
inst->alu.mul.magic_write &&
(inst->alu.mul.waddr == V3D_QPU_WADDR_TLB || (inst->alu.mul.waddr == V3D_QPU_WADDR_TLB ||
inst->alu.mul.waddr == V3D_QPU_WADDR_TLBU)) inst->alu.mul.waddr == V3D_QPU_WADDR_TLBU))
return true; return true;
@@ -1458,14 +1460,16 @@ instruction_latency(const struct v3d_device_info *devinfo,
after_inst->type != V3D_QPU_INSTR_TYPE_ALU) after_inst->type != V3D_QPU_INSTR_TYPE_ALU)
return latency; return latency;
if (before_inst->alu.add.magic_write) { if (before_inst->alu.add.op != V3D_QPU_A_NOP &&
before_inst->alu.add.magic_write) {
latency = MAX2(latency, latency = MAX2(latency,
magic_waddr_latency(devinfo, magic_waddr_latency(devinfo,
before_inst->alu.add.waddr, before_inst->alu.add.waddr,
after_inst)); after_inst));
} }
if (before_inst->alu.mul.magic_write) { if (before_inst->alu.mul.op != V3D_QPU_M_NOP &&
before_inst->alu.mul.magic_write) {
latency = MAX2(latency, latency = MAX2(latency,
magic_waddr_latency(devinfo, magic_waddr_latency(devinfo,
before_inst->alu.mul.waddr, before_inst->alu.mul.waddr,
@@ -1588,8 +1592,10 @@ qpu_inst_valid_in_thrend_slot(struct v3d_compile *c,
return false; return false;
/* No writing physical registers at the end. */ /* No writing physical registers at the end. */
if (!inst->alu.add.magic_write || bool add_is_nop = inst->alu.add.op == V3D_QPU_A_NOP;
!inst->alu.mul.magic_write) { bool mul_is_nop = inst->alu.mul.op == V3D_QPU_M_NOP;
if ((!add_is_nop && !inst->alu.add.magic_write) ||
(!mul_is_nop && !inst->alu.mul.magic_write)) {
return false; return false;
} }
@@ -1604,20 +1610,12 @@ qpu_inst_valid_in_thrend_slot(struct v3d_compile *c,
/* RF0-2 might be overwritten during the delay slots by /* RF0-2 might be overwritten during the delay slots by
* fragment shader setup. * fragment shader setup.
*/ */
if (inst->raddr_a < 3 && if (inst->raddr_a < 3 && v3d_qpu_uses_mux(inst, V3D_QPU_MUX_A))
(inst->alu.add.a == V3D_QPU_MUX_A ||
inst->alu.add.b == V3D_QPU_MUX_A ||
inst->alu.mul.a == V3D_QPU_MUX_A ||
inst->alu.mul.b == V3D_QPU_MUX_A)) {
return false; return false;
}
if (inst->raddr_b < 3 && if (inst->raddr_b < 3 &&
!inst->sig.small_imm && !inst->sig.small_imm &&
(inst->alu.add.a == V3D_QPU_MUX_B || v3d_qpu_uses_mux(inst, V3D_QPU_MUX_B)) {
inst->alu.add.b == V3D_QPU_MUX_B ||
inst->alu.mul.a == V3D_QPU_MUX_B ||
inst->alu.mul.b == V3D_QPU_MUX_B)) {
return false; return false;
} }
} }

30
src/broadcom/qpu/qpu_instr.c
View File

@@ -643,12 +643,14 @@ v3d_qpu_uses_tlb(const struct v3d_qpu_instr *inst)
return true; return true;
if (inst->type == V3D_QPU_INSTR_TYPE_ALU) { if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
if (inst->alu.add.magic_write && if (inst->alu.add.op != V3D_QPU_A_NOP &&
inst->alu.add.magic_write &&
v3d_qpu_magic_waddr_is_tlb(inst->alu.add.waddr)) { v3d_qpu_magic_waddr_is_tlb(inst->alu.add.waddr)) {
return true; return true;
} }
if (inst->alu.mul.magic_write && if (inst->alu.mul.op != V3D_QPU_M_NOP &&
inst->alu.mul.magic_write &&
v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr)) { v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr)) {
return true; return true;
} }
@@ -710,9 +712,11 @@ v3d_qpu_writes_tmu(const struct v3d_device_info *devinfo,
const struct v3d_qpu_instr *inst) const struct v3d_qpu_instr *inst)
{ {
return (inst->type == V3D_QPU_INSTR_TYPE_ALU && return (inst->type == V3D_QPU_INSTR_TYPE_ALU &&
((inst->alu.add.magic_write && ((inst->alu.add.op != V3D_QPU_A_NOP &&
inst->alu.add.magic_write &&
v3d_qpu_magic_waddr_is_tmu(devinfo, inst->alu.add.waddr)) || v3d_qpu_magic_waddr_is_tmu(devinfo, inst->alu.add.waddr)) ||
(inst->alu.mul.magic_write && (inst->alu.mul.op != V3D_QPU_M_NOP &&
inst->alu.mul.magic_write &&
v3d_qpu_magic_waddr_is_tmu(devinfo, inst->alu.mul.waddr)))); v3d_qpu_magic_waddr_is_tmu(devinfo, inst->alu.mul.waddr))));
} }
@@ -748,12 +752,14 @@ v3d_qpu_writes_vpm(const struct v3d_qpu_instr *inst)
if (v3d_qpu_add_op_writes_vpm(inst->alu.add.op)) if (v3d_qpu_add_op_writes_vpm(inst->alu.add.op))
return true; return true;
if (inst->alu.add.magic_write && if (inst->alu.add.op != V3D_QPU_A_NOP &&
inst->alu.add.magic_write &&
v3d_qpu_magic_waddr_is_vpm(inst->alu.add.waddr)) { v3d_qpu_magic_waddr_is_vpm(inst->alu.add.waddr)) {
return true; return true;
} }
if (inst->alu.mul.magic_write && if (inst->alu.mul.op != V3D_QPU_M_NOP &&
inst->alu.mul.magic_write &&
v3d_qpu_magic_waddr_is_vpm(inst->alu.mul.waddr)) { v3d_qpu_magic_waddr_is_vpm(inst->alu.mul.waddr)) {
return true; return true;
} }
@@ -819,10 +825,12 @@ qpu_writes_magic_waddr_explicitly(const struct v3d_device_info *devinfo,
uint32_t waddr) uint32_t waddr)
{ {
if (inst->type == V3D_QPU_INSTR_TYPE_ALU) { if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
if (inst->alu.add.magic_write && inst->alu.add.waddr == waddr) if (inst->alu.add.op != V3D_QPU_A_NOP &&
inst->alu.add.magic_write && inst->alu.add.waddr == waddr)
return true; return true;
if (inst->alu.mul.magic_write && inst->alu.mul.waddr == waddr) if (inst->alu.mul.op != V3D_QPU_M_NOP &&
inst->alu.mul.magic_write && inst->alu.mul.waddr == waddr)
return true; return true;
} }
@@ -849,13 +857,15 @@ v3d_qpu_writes_r4(const struct v3d_device_info *devinfo,
const struct v3d_qpu_instr *inst) const struct v3d_qpu_instr *inst)
{ {
if (inst->type == V3D_QPU_INSTR_TYPE_ALU) { if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
if (inst->alu.add.magic_write && if (inst->alu.add.op != V3D_QPU_A_NOP &&
inst->alu.add.magic_write &&
(inst->alu.add.waddr == V3D_QPU_WADDR_R4 || (inst->alu.add.waddr == V3D_QPU_WADDR_R4 ||
v3d_qpu_magic_waddr_is_sfu(inst->alu.add.waddr))) { v3d_qpu_magic_waddr_is_sfu(inst->alu.add.waddr))) {
return true; return true;
} }
if (inst->alu.mul.magic_write && if (inst->alu.mul.op != V3D_QPU_M_NOP &&
inst->alu.mul.magic_write &&
(inst->alu.mul.waddr == V3D_QPU_WADDR_R4 || (inst->alu.mul.waddr == V3D_QPU_WADDR_R4 ||
v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr))) { v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr))) {
return true; return true;