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nir: make nir_const_value scalar

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v2: remove & operator in a couple of memsets
    add some memsets
v3: fixup lima

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v2)
This commit is contained in:
Karol Herbst
2019-03-27 00:59:03 +01:00
parent 73d883037d
commit 14531d676b
43 changed files with 470 additions and 416 deletions
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8
src/intel/compiler/brw_vec4_nir.cpp
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@@ -353,18 +353,18 @@ vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr)
for (unsigned j = i; j < instr->def.num_components; j++) {
if ((instr->def.bit_size == 32 &&
instr->value.u32[i] == instr->value.u32[j]) ||
instr->value[i].u32 == instr->value[j].u32) ||
(instr->def.bit_size == 64 &&
instr->value.f64[i] == instr->value.f64[j])) {
instr->value[i].f64 == instr->value[j].f64)) {
writemask |= 1 << j;
}
}
reg.writemask = writemask;
if (instr->def.bit_size == 64) {
emit(MOV(reg, setup_imm_df(ibld, instr->value.f64[i])));
emit(MOV(reg, setup_imm_df(ibld, instr->value[i].f64)));
} else {
emit(MOV(reg, brw_imm_d(instr->value.i32[i])));
emit(MOV(reg, brw_imm_d(instr->value[i].i32)));
}
remaining &= ~writemask;