From 139e8f46358475520fdf2fe80cbe116adfe8084d Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 20 Jul 2022 16:53:14 +0300 Subject: [PATCH] intel/fs: fixup a64 messages And run algebraic when either int64 for float64 are not supported so those don't end up in the generated code. Cc: mesa-stable Signed-off-by: Lionel Landwerlin Reviewed-by: Ivan Briano Part-of: --- src/intel/compiler/brw_fs.cpp | 2 +- src/intel/compiler/brw_lower_logical_sends.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 8969e35ecd9..1a0140cfdfc 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -6011,7 +6011,7 @@ fs_visitor::optimize() OPT(split_virtual_grfs); /* Lower 64 bit MOVs generated by payload lowering. */ - if (!devinfo->has_64bit_float && !devinfo->has_64bit_int) + if (!devinfo->has_64bit_float || !devinfo->has_64bit_int) OPT(opt_algebraic); OPT(register_coalesce); diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index f469ee01865..4972a55e649 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -1988,7 +1988,7 @@ emit_a64_oword_block_header(const fs_builder &bld, const fs_reg &addr) /* We can't do stride 1 with the UNIFORM file, it requires stride 0 */ expanded_addr = ubld.vgrf(BRW_REGISTER_TYPE_UQ); expanded_addr.stride = 0; - ubld.MOV(expanded_addr, addr); + ubld.MOV(expanded_addr, retype(addr, BRW_REGISTER_TYPE_UQ)); } fs_reg header = ubld.vgrf(BRW_REGISTER_TYPE_UD);