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intel/compiler: Fill a compiler statistics struct

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This commit is all annoying plumbing work which just adds support for a
new brw_compile_stats struct.  This struct provides a binary driver
readable form of the same statistics we dump out to stderr when we
INTEL_DEBUG is set with a shader stage.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
Jason Ekstrand
2019-04-23 23:19:56 -05:00
parent 2720ad5fd9
commit 134607760a
19 changed files with 89 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
src/gallium/drivers/iris/iris_program.c
View File

@@ -941,7 +941,7 @@ iris_compile_vs(struct iris_context *ice,
char *error_str = NULL; char *error_str = NULL;
const unsigned *program = const unsigned *program =
brw_compile_vs(compiler, &ice->dbg, mem_ctx, &key_no_ucp, vs_prog_data, brw_compile_vs(compiler, &ice->dbg, mem_ctx, &key_no_ucp, vs_prog_data,
nir, -1, &error_str); nir, -1, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
dbg_printf("Failed to compile vertex shader: %s\n", error_str); dbg_printf("Failed to compile vertex shader: %s\n", error_str);
ralloc_free(mem_ctx); ralloc_free(mem_ctx);
@@ -1151,7 +1151,7 @@ iris_compile_tcs(struct iris_context *ice,
char *error_str = NULL; char *error_str = NULL;
const unsigned *program = const unsigned *program =
brw_compile_tcs(compiler, &ice->dbg, mem_ctx, key, tcs_prog_data, nir, brw_compile_tcs(compiler, &ice->dbg, mem_ctx, key, tcs_prog_data, nir,
-1, &error_str); -1, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
dbg_printf("Failed to compile control shader: %s\n", error_str); dbg_printf("Failed to compile control shader: %s\n", error_str);
ralloc_free(mem_ctx); ralloc_free(mem_ctx);
@@ -1271,7 +1271,7 @@ iris_compile_tes(struct iris_context *ice,
char *error_str = NULL; char *error_str = NULL;
const unsigned *program = const unsigned *program =
brw_compile_tes(compiler, &ice->dbg, mem_ctx, key, &input_vue_map, brw_compile_tes(compiler, &ice->dbg, mem_ctx, key, &input_vue_map,
tes_prog_data, nir, NULL, -1, &error_str); tes_prog_data, nir, NULL, -1, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
dbg_printf("Failed to compile evaluation shader: %s\n", error_str); dbg_printf("Failed to compile evaluation shader: %s\n", error_str);
ralloc_free(mem_ctx); ralloc_free(mem_ctx);
@@ -1391,7 +1391,7 @@ iris_compile_gs(struct iris_context *ice,
char *error_str = NULL; char *error_str = NULL;
const unsigned *program = const unsigned *program =
brw_compile_gs(compiler, &ice->dbg, mem_ctx, key, gs_prog_data, nir, brw_compile_gs(compiler, &ice->dbg, mem_ctx, key, gs_prog_data, nir,
NULL, -1, &error_str); NULL, -1, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
dbg_printf("Failed to compile geometry shader: %s\n", error_str); dbg_printf("Failed to compile geometry shader: %s\n", error_str);
ralloc_free(mem_ctx); ralloc_free(mem_ctx);
@@ -1493,7 +1493,8 @@ iris_compile_fs(struct iris_context *ice,
char *error_str = NULL; char *error_str = NULL;
const unsigned *program = const unsigned *program =
brw_compile_fs(compiler, &ice->dbg, mem_ctx, key, fs_prog_data, brw_compile_fs(compiler, &ice->dbg, mem_ctx, key, fs_prog_data,
nir, NULL, -1, -1, -1, true, false, vue_map, &error_str); nir, NULL, -1, -1, -1, true, false, vue_map,
NULL, &error_str);
if (program == NULL) { if (program == NULL) {
dbg_printf("Failed to compile fragment shader: %s\n", error_str); dbg_printf("Failed to compile fragment shader: %s\n", error_str);
ralloc_free(mem_ctx); ralloc_free(mem_ctx);
@@ -1737,7 +1738,7 @@ iris_compile_cs(struct iris_context *ice,
char *error_str = NULL; char *error_str = NULL;
const unsigned *program = const unsigned *program =
brw_compile_cs(compiler, &ice->dbg, mem_ctx, key, cs_prog_data, brw_compile_cs(compiler, &ice->dbg, mem_ctx, key, cs_prog_data,
nir, -1, &error_str); nir, -1, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
dbg_printf("Failed to compile compute shader: %s\n", error_str); dbg_printf("Failed to compile compute shader: %s\n", error_str);
ralloc_free(mem_ctx); ralloc_free(mem_ctx);

4
src/intel/blorp/blorp.c
View File

@@ -206,7 +206,7 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
const unsigned *program = const unsigned *program =
brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key, brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key,
wm_prog_data, nir, NULL, -1, -1, -1, false, use_repclear, wm_prog_data, nir, NULL, -1, -1, -1, false, use_repclear,
NULL, NULL); NULL, NULL, NULL);
return program; return program;
} }
@@ -235,7 +235,7 @@ blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx,
const unsigned *program = const unsigned *program =
brw_compile_vs(compiler, blorp->driver_ctx, mem_ctx, brw_compile_vs(compiler, blorp->driver_ctx, mem_ctx,
&vs_key, vs_prog_data, nir, -1, NULL); &vs_key, vs_prog_data, nir, -1, NULL, NULL);
return program; return program;
} }

15
src/intel/compiler/brw_compiler.h
View File

@@ -1240,6 +1240,15 @@ DEFINE_PROG_DATA_DOWNCAST(clip)
DEFINE_PROG_DATA_DOWNCAST(sf) DEFINE_PROG_DATA_DOWNCAST(sf)
#undef DEFINE_PROG_DATA_DOWNCAST #undef DEFINE_PROG_DATA_DOWNCAST
struct brw_compile_stats {
uint32_t dispatch_width; /**< 0 for vec4 */
uint32_t instructions;
uint32_t loops;
uint32_t cycles;
uint32_t spills;
uint32_t fills;
};
/** @} */ /** @} */
struct brw_compiler * struct brw_compiler *
@@ -1278,6 +1287,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
struct brw_vs_prog_data *prog_data, struct brw_vs_prog_data *prog_data,
struct nir_shader *shader, struct nir_shader *shader,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str); char **error_str);
/** /**
@@ -1293,6 +1303,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
struct brw_tcs_prog_data *prog_data, struct brw_tcs_prog_data *prog_data,
struct nir_shader *nir, struct nir_shader *nir,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str); char **error_str);
/** /**
@@ -1309,6 +1320,7 @@ brw_compile_tes(const struct brw_compiler *compiler, void *log_data,
struct nir_shader *shader, struct nir_shader *shader,
struct gl_program *prog, struct gl_program *prog,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str); char **error_str);
/** /**
@@ -1324,6 +1336,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
struct nir_shader *shader, struct nir_shader *shader,
struct gl_program *prog, struct gl_program *prog,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str); char **error_str);
/** /**
@@ -1375,6 +1388,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
int shader_time_index32, int shader_time_index32,
bool allow_spilling, bool allow_spilling,
bool use_rep_send, struct brw_vue_map *vue_map, bool use_rep_send, struct brw_vue_map *vue_map,
struct brw_compile_stats *stats, /**< Array of three stats */
char **error_str); char **error_str);
/** /**
@@ -1389,6 +1403,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
struct brw_cs_prog_data *prog_data, struct brw_cs_prog_data *prog_data,
const struct nir_shader *shader, const struct nir_shader *shader,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str); char **error_str);
void brw_debug_key_recompile(const struct brw_compiler *c, void *log, void brw_debug_key_recompile(const struct brw_compiler *c, void *log,

13
src/intel/compiler/brw_fs.cpp
View File

@@ -8033,6 +8033,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
int shader_time_index8, int shader_time_index16, int shader_time_index8, int shader_time_index16,
int shader_time_index32, bool allow_spilling, int shader_time_index32, bool allow_spilling,
bool use_rep_send, struct brw_vue_map *vue_map, bool use_rep_send, struct brw_vue_map *vue_map,
struct brw_compile_stats *stats,
char **error_str) char **error_str)
{ {
const struct gen_device_info *devinfo = compiler->devinfo; const struct gen_device_info *devinfo = compiler->devinfo;
@@ -8196,17 +8197,20 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
if (simd8_cfg) { if (simd8_cfg) {
prog_data->dispatch_8 = true; prog_data->dispatch_8 = true;
g.generate_code(simd8_cfg, 8); g.generate_code(simd8_cfg, 8, stats);
stats = stats ? stats + 1 : NULL;
} }
if (simd16_cfg) { if (simd16_cfg) {
prog_data->dispatch_16 = true; prog_data->dispatch_16 = true;
prog_data->prog_offset_16 = g.generate_code(simd16_cfg, 16); prog_data->prog_offset_16 = g.generate_code(simd16_cfg, 16, stats);
stats = stats ? stats + 1 : NULL;
} }
if (simd32_cfg) { if (simd32_cfg) {
prog_data->dispatch_32 = true; prog_data->dispatch_32 = true;
prog_data->prog_offset_32 = g.generate_code(simd32_cfg, 32); prog_data->prog_offset_32 = g.generate_code(simd32_cfg, 32, stats);
stats = stats ? stats + 1 : NULL;
} }
return g.get_assembly(); return g.get_assembly();
@@ -8317,6 +8321,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
struct brw_cs_prog_data *prog_data, struct brw_cs_prog_data *prog_data,
const nir_shader *src_shader, const nir_shader *src_shader,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str) char **error_str)
{ {
prog_data->base.total_shared = src_shader->info.cs.shared_size; prog_data->base.total_shared = src_shader->info.cs.shared_size;
@@ -8457,7 +8462,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
g.enable_debug(name); g.enable_debug(name);
} }
g.generate_code(v->cfg, prog_data->simd_size); g.generate_code(v->cfg, prog_data->simd_size, stats);
ret = g.get_assembly(); ret = g.get_assembly();
} }

3
src/intel/compiler/brw_fs.h
View File

@@ -428,7 +428,8 @@ public:
~fs_generator(); ~fs_generator();
void enable_debug(const char *shader_name); void enable_debug(const char *shader_name);
int generate_code(const cfg_t *cfg, int dispatch_width); int generate_code(const cfg_t *cfg, int dispatch_width,
struct brw_compile_stats *stats);
const unsigned *get_assembly(); const unsigned *get_assembly();
private: private:

11
src/intel/compiler/brw_fs_generator.cpp
View File

@@ -1664,7 +1664,8 @@ fs_generator::enable_debug(const char *shader_name)
} }
int int
fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
struct brw_compile_stats *stats)
{ {
/* align to 64 byte boundary. */ /* align to 64 byte boundary. */
while (p->next_insn_offset % 64) while (p->next_insn_offset % 64)
@@ -2336,6 +2337,14 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
shader_stats.scheduler_mode, shader_stats.scheduler_mode,
shader_stats.promoted_constants, shader_stats.promoted_constants,
before_size, after_size); before_size, after_size);
if (stats) {
stats->dispatch_width = dispatch_width;
stats->instructions = before_size / 16;
stats->loops = loop_count;
stats->cycles = cfg->cycle_count;
stats->spills = spill_count;
stats->fills = fill_count;
}
return start_offset; return start_offset;
} }

5
src/intel/compiler/brw_shader.cpp
View File

@@ -1235,6 +1235,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
nir_shader *nir, nir_shader *nir,
struct gl_program *prog, struct gl_program *prog,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str) char **error_str)
{ {
const struct gen_device_info *devinfo = compiler->devinfo; const struct gen_device_info *devinfo = compiler->devinfo;
@@ -1345,7 +1346,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
nir->info.name)); nir->info.name));
} }
g.generate_code(v.cfg, 8); g.generate_code(v.cfg, 8, stats);
assembly = g.get_assembly(); assembly = g.get_assembly();
} else { } else {
@@ -1361,7 +1362,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
v.dump_instructions(); v.dump_instructions();
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
&prog_data->base, v.cfg); &prog_data->base, v.cfg, stats);
} }
return assembly; return assembly;

6
src/intel/compiler/brw_vec4.cpp
View File

@@ -2842,6 +2842,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
struct brw_vs_prog_data *prog_data, struct brw_vs_prog_data *prog_data,
nir_shader *shader, nir_shader *shader,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str) char **error_str)
{ {
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_VERTEX]; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_VERTEX];
@@ -2986,7 +2987,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
g.enable_debug(debug_name); g.enable_debug(debug_name);
} }
g.generate_code(v.cfg, 8); g.generate_code(v.cfg, 8, stats);
assembly = g.get_assembly(); assembly = g.get_assembly();
} }
@@ -3003,7 +3004,8 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
} }
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
shader, &prog_data->base, v.cfg); shader, &prog_data->base,
v.cfg, stats);
} }
return assembly; return assembly;

3
src/intel/compiler/brw_vec4.h
View File

@@ -45,7 +45,8 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
void *mem_ctx, void *mem_ctx,
const nir_shader *nir, const nir_shader *nir,
struct brw_vue_prog_data *prog_data, struct brw_vue_prog_data *prog_data,
const struct cfg_t *cfg); const struct cfg_t *cfg,
struct brw_compile_stats *stats);
#ifdef __cplusplus #ifdef __cplusplus
} /* extern "C" */ } /* extern "C" */

17
src/intel/compiler/brw_vec4_generator.cpp
View File

@@ -1497,7 +1497,8 @@ generate_code(struct brw_codegen *p,
void *log_data, void *log_data,
const nir_shader *nir, const nir_shader *nir,
struct brw_vue_prog_data *prog_data, struct brw_vue_prog_data *prog_data,
const struct cfg_t *cfg) const struct cfg_t *cfg,
struct brw_compile_stats *stats)
{ {
const struct gen_device_info *devinfo = p->devinfo; const struct gen_device_info *devinfo = p->devinfo;
const char *stage_abbrev = _mesa_shader_stage_to_abbrev(nir->info.stage); const char *stage_abbrev = _mesa_shader_stage_to_abbrev(nir->info.stage);
@@ -2208,7 +2209,14 @@ generate_code(struct brw_codegen *p,
stage_abbrev, before_size / 16, stage_abbrev, before_size / 16,
loop_count, cfg->cycle_count, spill_count, loop_count, cfg->cycle_count, spill_count,
fill_count, before_size, after_size); fill_count, before_size, after_size);
if (stats) {
stats->dispatch_width = 0;
stats->instructions = before_size / 16;
stats->loops = loop_count;
stats->cycles = cfg->cycle_count;
stats->spills = spill_count;
stats->fills = fill_count;
}
} }
extern "C" const unsigned * extern "C" const unsigned *
@@ -2217,13 +2225,14 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
void *mem_ctx, void *mem_ctx,
const nir_shader *nir, const nir_shader *nir,
struct brw_vue_prog_data *prog_data, struct brw_vue_prog_data *prog_data,
const struct cfg_t *cfg) const struct cfg_t *cfg,
struct brw_compile_stats *stats)
{ {
struct brw_codegen *p = rzalloc(mem_ctx, struct brw_codegen); struct brw_codegen *p = rzalloc(mem_ctx, struct brw_codegen);
brw_init_codegen(compiler->devinfo, p, mem_ctx); brw_init_codegen(compiler->devinfo, p, mem_ctx);
brw_set_default_access_mode(p, BRW_ALIGN_16); brw_set_default_access_mode(p, BRW_ALIGN_16);
generate_code(p, compiler, log_data, nir, prog_data, cfg); generate_code(p, compiler, log_data, nir, prog_data, cfg, stats);
return brw_get_program(p, &prog_data->base.program_size); return brw_get_program(p, &prog_data->base.program_size);
} }

8
src/intel/compiler/brw_vec4_gs_visitor.cpp
View File

@@ -618,6 +618,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
nir_shader *shader, nir_shader *shader,
struct gl_program *prog, struct gl_program *prog,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str) char **error_str)
{ {
struct brw_gs_compile c; struct brw_gs_compile c;
@@ -865,7 +866,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
label, shader->info.name); label, shader->info.name);
g.enable_debug(name); g.enable_debug(name);
} }
g.generate_code(v.cfg, 8); g.generate_code(v.cfg, 8, stats);
return g.get_assembly(); return g.get_assembly();
} }
} }
@@ -896,7 +897,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
/* Success! Backup is not needed */ /* Success! Backup is not needed */
ralloc_free(param); ralloc_free(param);
return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, return brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
shader, &prog_data->base, v.cfg); shader, &prog_data->base,
v.cfg, stats);
} else { } else {
/* These variables could be modified by the execution of the GS /* These variables could be modified by the execution of the GS
* visitor if it packed the uniforms in the push constant buffer. * visitor if it packed the uniforms in the push constant buffer.
@@ -959,7 +961,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
*error_str = ralloc_strdup(mem_ctx, gs->fail_msg); *error_str = ralloc_strdup(mem_ctx, gs->fail_msg);
} else { } else {
ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader, ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader,
&prog_data->base, gs->cfg); &prog_data->base, gs->cfg, stats);
} }
delete gs; delete gs;

5
src/intel/compiler/brw_vec4_tcs.cpp
View File

@@ -329,6 +329,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
struct brw_tcs_prog_data *prog_data, struct brw_tcs_prog_data *prog_data,
nir_shader *nir, nir_shader *nir,
int shader_time_index, int shader_time_index,
struct brw_compile_stats *stats,
char **error_str) char **error_str)
{ {
const struct gen_device_info *devinfo = compiler->devinfo; const struct gen_device_info *devinfo = compiler->devinfo;
@@ -446,7 +447,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
nir->info.name)); nir->info.name));
} }
g.generate_code(v.cfg, 8); g.generate_code(v.cfg, 8, stats);
assembly = g.get_assembly(); assembly = g.get_assembly();
} else { } else {
@@ -463,7 +464,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
&prog_data->base, v.cfg); &prog_data->base, v.cfg, stats);
} }
return assembly; return assembly;

13
src/intel/vulkan/anv_pipeline.c
View File

@@ -748,7 +748,8 @@ anv_pipeline_compile_vs(const struct brw_compiler *compiler,
vs_stage->nir->info.separate_shader); vs_stage->nir->info.separate_shader);
return brw_compile_vs(compiler, device, mem_ctx, &vs_stage->key.vs, return brw_compile_vs(compiler, device, mem_ctx, &vs_stage->key.vs,
&vs_stage->prog_data.vs, vs_stage->nir, -1, NULL); &vs_stage->prog_data.vs, vs_stage->nir, -1,
NULL, NULL);
} }
static void static void
@@ -832,7 +833,7 @@ anv_pipeline_compile_tcs(const struct brw_compiler *compiler,
return brw_compile_tcs(compiler, device, mem_ctx, &tcs_stage->key.tcs, return brw_compile_tcs(compiler, device, mem_ctx, &tcs_stage->key.tcs,
&tcs_stage->prog_data.tcs, tcs_stage->nir, &tcs_stage->prog_data.tcs, tcs_stage->nir,
-1, NULL); -1, NULL, NULL);
} }
static void static void
@@ -859,7 +860,7 @@ anv_pipeline_compile_tes(const struct brw_compiler *compiler,
return brw_compile_tes(compiler, device, mem_ctx, &tes_stage->key.tes, return brw_compile_tes(compiler, device, mem_ctx, &tes_stage->key.tes,
&tcs_stage->prog_data.tcs.base.vue_map, &tcs_stage->prog_data.tcs.base.vue_map,
&tes_stage->prog_data.tes, tes_stage->nir, &tes_stage->prog_data.tes, tes_stage->nir,
NULL, -1, NULL); NULL, -1, NULL, NULL);
} }
static void static void
@@ -885,7 +886,7 @@ anv_pipeline_compile_gs(const struct brw_compiler *compiler,
return brw_compile_gs(compiler, device, mem_ctx, &gs_stage->key.gs, return brw_compile_gs(compiler, device, mem_ctx, &gs_stage->key.gs,
&gs_stage->prog_data.gs, gs_stage->nir, &gs_stage->prog_data.gs, gs_stage->nir,
NULL, -1, NULL); NULL, -1, NULL, NULL);
} }
static void static void
@@ -1020,7 +1021,7 @@ anv_pipeline_compile_fs(const struct brw_compiler *compiler,
const unsigned *code = const unsigned *code =
brw_compile_fs(compiler, device, mem_ctx, &fs_stage->key.wm, brw_compile_fs(compiler, device, mem_ctx, &fs_stage->key.wm,
&fs_stage->prog_data.wm, fs_stage->nir, &fs_stage->prog_data.wm, fs_stage->nir,
NULL, -1, -1, -1, true, false, NULL, NULL); NULL, -1, -1, -1, true, false, NULL, NULL, NULL);
if (fs_stage->key.wm.nr_color_regions == 0 && if (fs_stage->key.wm.nr_color_regions == 0 &&
!fs_stage->prog_data.wm.has_side_effects && !fs_stage->prog_data.wm.has_side_effects &&
@@ -1445,7 +1446,7 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
const unsigned *shader_code = const unsigned *shader_code =
brw_compile_cs(compiler, pipeline->device, mem_ctx, &stage.key.cs, brw_compile_cs(compiler, pipeline->device, mem_ctx, &stage.key.cs,
&stage.prog_data.cs, stage.nir, -1, NULL); &stage.prog_data.cs, stage.nir, -1, NULL, NULL);
if (shader_code == NULL) { if (shader_code == NULL) {
ralloc_free(mem_ctx); ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);

2
src/mesa/drivers/dri/i965/brw_cs.c
View File

@@ -90,7 +90,7 @@ brw_codegen_cs_prog(struct brw_context *brw,
char *error_str; char *error_str;
program = brw_compile_cs(brw->screen->compiler, brw, mem_ctx, key, program = brw_compile_cs(brw->screen->compiler, brw, mem_ctx, key,
&prog_data, nir, st_index, &error_str); &prog_data, nir, st_index, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
cp->program.sh.data->LinkStatus = LINKING_FAILURE; cp->program.sh.data->LinkStatus = LINKING_FAILURE;
ralloc_strcat(&cp->program.sh.data->InfoLog, error_str); ralloc_strcat(&cp->program.sh.data->InfoLog, error_str);

3
src/mesa/drivers/dri/i965/brw_gs.c
View File

@@ -93,7 +93,8 @@ brw_codegen_gs_prog(struct brw_context *brw,
char *error_str; char *error_str;
const unsigned *program = const unsigned *program =
brw_compile_gs(brw->screen->compiler, brw, mem_ctx, key, brw_compile_gs(brw->screen->compiler, brw, mem_ctx, key,
&prog_data, nir, &gp->program, st_index, &error_str); &prog_data, nir, &gp->program, st_index,
NULL, &error_str);
if (program == NULL) { if (program == NULL) {
ralloc_strcat(&gp->program.sh.data->InfoLog, error_str); ralloc_strcat(&gp->program.sh.data->InfoLog, error_str);
_mesa_problem(NULL, "Failed to compile geometry shader: %s\n", error_str); _mesa_problem(NULL, "Failed to compile geometry shader: %s\n", error_str);

2
src/mesa/drivers/dri/i965/brw_tcs.c
View File

@@ -109,7 +109,7 @@ brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp,
char *error_str; char *error_str;
const unsigned *program = const unsigned *program =
brw_compile_tcs(compiler, brw, mem_ctx, key, &prog_data, nir, st_index, brw_compile_tcs(compiler, brw, mem_ctx, key, &prog_data, nir, st_index,
&error_str); NULL, &error_str);
if (program == NULL) { if (program == NULL) {
if (tep) { if (tep) {
tep->program.sh.data->LinkStatus = LINKING_FAILURE; tep->program.sh.data->LinkStatus = LINKING_FAILURE;

2
src/mesa/drivers/dri/i965/brw_tes.c
View File

@@ -76,7 +76,7 @@ brw_codegen_tes_prog(struct brw_context *brw,
char *error_str; char *error_str;
const unsigned *program = const unsigned *program =
brw_compile_tes(compiler, brw, mem_ctx, key, &input_vue_map, &prog_data, brw_compile_tes(compiler, brw, mem_ctx, key, &input_vue_map, &prog_data,
nir, &tep->program, st_index, &error_str); nir, &tep->program, st_index, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
tep->program.sh.data->LinkStatus = LINKING_FAILURE; tep->program.sh.data->LinkStatus = LINKING_FAILURE;
ralloc_strcat(&tep->program.sh.data->InfoLog, error_str); ralloc_strcat(&tep->program.sh.data->InfoLog, error_str);

2
src/mesa/drivers/dri/i965/brw_vs.c
View File

@@ -186,7 +186,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
*/ */
char *error_str; char *error_str;
program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data, program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data,
nir, st_index, &error_str); nir, st_index, NULL, &error_str);
if (program == NULL) { if (program == NULL) {
if (!vp->program.is_arb_asm) { if (!vp->program.is_arb_asm) {
vp->program.sh.data->LinkStatus = LINKING_FAILURE; vp->program.sh.data->LinkStatus = LINKING_FAILURE;

2
src/mesa/drivers/dri/i965/brw_wm.c
View File

@@ -124,7 +124,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
key, &prog_data, nir, key, &prog_data, nir,
&fp->program, st_index8, st_index16, st_index32, &fp->program, st_index8, st_index16, st_index32,
true, false, vue_map, true, false, vue_map,
&error_str); NULL, &error_str);
if (program == NULL) { if (program == NULL) {
if (!fp->program.is_arb_asm) { if (!fp->program.is_arb_asm) {