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v3d: Fix atomic cmpxchg in shaders on hardware.

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In what might be my first case of finding a divergence between hardware
and simpenrose for v3d 4.x, it seems that despite what the spec claims,
you actually need specific values in the TYPE field for atomic ops.

Fixes dEQP-GLES31.functional.*.compswap.*
This commit is contained in:
Eric Anholt
2019-04-17 14:44:44 -07:00
parent 1ce143ca19
commit 12f6c34806
1 changed files with 13 additions and 3 deletions
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16
src/broadcom/compiler/nir_to_vir.c
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@@ -266,14 +266,24 @@ ntq_emit_tmu_general(struct v3d_compile *c, nir_intrinsic_instr *instr,
1 : 0])); 1 : 0]));
} }
/* The spec says that for atomics, the TYPE field is ignored, but that
* doesn't seem to be the case for CMPXCHG. Just use the number of
* tmud writes we did to decide the type (or choose "32bit" for atomic
* reads, which has been fine).
*/
int num_components;
if (tmu_op == GENERAL_TMU_WRITE_OP_ATOMIC_CMPXCHG)
num_components = 2;
else
num_components = instr->num_components;
uint32_t config = (0xffffff00 | uint32_t config = (0xffffff00 |
tmu_op | tmu_op |
GENERAL_TMU_LOOKUP_PER_PIXEL); GENERAL_TMU_LOOKUP_PER_PIXEL);
if (instr->num_components == 1) { if (num_components == 1) {
config |= GENERAL_TMU_LOOKUP_TYPE_32BIT_UI; config |= GENERAL_TMU_LOOKUP_TYPE_32BIT_UI;
} else { } else {
config |= (GENERAL_TMU_LOOKUP_TYPE_VEC2 + config |= GENERAL_TMU_LOOKUP_TYPE_VEC2 + num_components - 2;
instr->num_components - 2);
} }
if (vir_in_nonuniform_control_flow(c)) { if (vir_in_nonuniform_control_flow(c)) {