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radv: lower streamout in NIR

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18898>
This commit is contained in:
Rhys Perry
2022-09-28 17:17:35 +01:00
committed by Marge Bot
parent 19d0403594
commit 12becb8839
3 changed files with 1 additions and 10 deletions
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3
src/amd/compiler/aco_instruction_selection.cpp
View File

@@ -12095,9 +12095,6 @@ select_program(Program* program, unsigned shader_count, struct nir_shader* const
visit_cf_list(&ctx, &func->body);
if (ctx.program->info.so.num_outputs && ctx.stage.hw == HWStage::VS)
emit_streamout(&ctx, 0);
if (nir->info.stage == MESA_SHADER_GEOMETRY && !ngg_gs) {
Builder bld(ctx.program, ctx.block);
bld.barrier(aco_opcode::p_barrier,

6
src/amd/vulkan/radv_nir_to_llvm.c
View File

@@ -1018,12 +1018,6 @@ handle_vs_outputs_post(struct radv_shader_context *ctx)
struct radv_shader_output_values *outputs;
unsigned noutput = 0;
if (ctx->shader_info->so.num_outputs && !ctx->args->is_gs_copy_shader &&
ctx->stage != MESA_SHADER_GEOMETRY && !ctx->shader_info->is_ngg) {
/* The GS copy shader emission already emits streamout. */
radv_emit_streamout(ctx, 0);
}
/* Allocate a temporary array for the output values. */
unsigned num_outputs = util_bitcount64(ctx->output_mask);
outputs = malloc(num_outputs * sizeof(outputs[0]));

2
src/amd/vulkan/radv_pipeline.c
View File

@@ -3850,7 +3850,7 @@ radv_postprocess_nir(struct radv_pipeline *pipeline,
if (stage->stage == last_vgt_api_stage && stage->stage != MESA_SHADER_GEOMETRY && !lowered_ngg)
NIR_PASS_V(stage->nir, ac_nir_lower_legacy_vs,
stage->info.outinfo.export_prim_id ? VARYING_SLOT_PRIMITIVE_ID : -1, true);
stage->info.outinfo.export_prim_id ? VARYING_SLOT_PRIMITIVE_ID : -1, false);
NIR_PASS(_, stage->nir, nir_opt_idiv_const, 8);