radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there
If both mrtz and alpha-to-coverage are enabled, the alpha channel must be exported through mrtz. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
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@@ -4232,7 +4232,8 @@ LLVMValueRef ac_build_call(struct ac_llvm_context *ctx, LLVMValueRef func, LLVMV
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}
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void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueRef stencil,
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LLVMValueRef samplemask, bool is_last, struct ac_export_args *args)
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LLVMValueRef samplemask, LLVMValueRef mrtz_alpha, bool is_last,
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struct ac_export_args *args)
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{
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unsigned mask = 0;
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unsigned format = ac_get_spi_shader_z_format(depth != NULL, stencil != NULL, samplemask != NULL);
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@@ -4271,6 +4272,17 @@ void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueR
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args->out[1] = samplemask;
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mask |= ctx->chip_class >= GFX11 ? 0x2 : 0xc;
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}
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if (mrtz_alpha) {
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/* MRT0 alpha should be in Y[31:16] if alpha-to-coverage is enabled and MRTZ is present. */
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assert(ctx->chip_class >= GFX11);
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mrtz_alpha = LLVMBuildFPTrunc(ctx->builder, mrtz_alpha, ctx->f16, "");
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mrtz_alpha = ac_to_integer(ctx, mrtz_alpha);
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mrtz_alpha = LLVMBuildZExt(ctx->builder, mrtz_alpha, ctx->i32, "");
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mrtz_alpha = LLVMBuildShl(ctx->builder, mrtz_alpha, LLVMConstInt(ctx->i32, 16, 0), "");
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args->out[1] = LLVMBuildOr(ctx->builder, ac_to_integer(ctx, args->out[1]), mrtz_alpha, "");
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args->out[1] = ac_to_float(ctx, args->out[1]);
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mask |= 0x2;
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}
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} else {
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if (depth) {
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args->out[0] = depth;
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@@ -4284,6 +4296,10 @@ void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueR
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args->out[2] = samplemask;
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mask |= 0x4;
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}
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if (mrtz_alpha) {
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args->out[3] = mrtz_alpha;
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mask |= 0x8;
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}
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}
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/* GFX6 (except OLAND and HAINAN) has a bug that it only looks
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