nir: intel/vec4: Add flag to disable some algebraic optimizations
A couple patches later in this series use the flag to avoid a few thousand shader-db regresions on all vec4 platforms. I'm not particularly enamored with the name of this flag. However, I suspect the Intel vec4 backend is the only backend that will benefit from it. Specifically, the cases where this helps are all cases where we want to prevent nir_opt_algebraic from rearranging instructions to create 3-source instructions, such as ffma and flrp, with additional immediate value or uniform sources. The earlier commit "intel/vec4: Try to emit a single load for multiple 3-src instruction operands" solves most of the problems caused by additional immediate values, but the restrictions on register strides that cause problems for uniforms and shader inputs persist. Reviewed-by: Matt Turner <mattst88@gmail.com>
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@@ -2630,6 +2630,16 @@ typedef struct nir_shader_compiler_options {
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/* Lowers when rotate instruction is not supported */
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bool lower_rotate;
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/**
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* Is this the Intel vec4 backend?
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*
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* Used to inhibit algebraic optimizations that are known to be harmful on
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* the Intel vec4 backend. This is generally applicable to any
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* optimization that might cause more immediate values to be used in
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* 3-source (e.g., ffma and flrp) instructions.
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*/
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bool intel_vec4;
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unsigned max_unroll_iterations;
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nir_lower_int64_options lower_int64_options;
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