nir: intel/vec4: Add flag to disable some algebraic optimizations

A couple patches later in this series use the flag to avoid a few
thousand shader-db regresions on all vec4 platforms.

I'm not particularly enamored with the name of this flag.  However, I
suspect the Intel vec4 backend is the only backend that will benefit
from it.  Specifically, the cases where this helps are all cases where
we want to prevent nir_opt_algebraic from rearranging instructions to
create 3-source instructions, such as ffma and flrp, with additional
immediate value or uniform sources.

The earlier commit "intel/vec4: Try to emit a single load for multiple
3-src instruction operands" solves most of the problems caused by
additional immediate values, but the restrictions on register strides
that cause problems for uniforms and shader inputs persist.

Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Ian Romanick
2019-06-03 15:22:15 -07:00
parent 3a1fdca5ad
commit 1259f6d802
2 changed files with 11 additions and 0 deletions

View File

@@ -2630,6 +2630,16 @@ typedef struct nir_shader_compiler_options {
/* Lowers when rotate instruction is not supported */
bool lower_rotate;
/**
* Is this the Intel vec4 backend?
*
* Used to inhibit algebraic optimizations that are known to be harmful on
* the Intel vec4 backend. This is generally applicable to any
* optimization that might cause more immediate values to be used in
* 3-source (e.g., ffma and flrp) instructions.
*/
bool intel_vec4;
unsigned max_unroll_iterations;
nir_lower_int64_options lower_int64_options;