From 1174f376096ed6ceebb0fb2810456f1501a68df7 Mon Sep 17 00:00:00 2001 From: Iago Toral Quiroga Date: Wed, 9 Nov 2022 13:07:45 +0100 Subject: [PATCH] broadcom/compiler: avoid using ldvary sequence to hide latency of branching MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This can cause us to stomp the contents of r5 before we have a chance to read it, like this: 0x3d103186bb800000 nop ; nop ; ldvary.r0 0x3d105686bbf40000 nop ; mov rf26, r5 ; ldvary.r1 0x020000ef0000d000 bu.allna 232, r:unif (0x0000001c / 0.000000) 0x3d1096c6bbf40000 nop ; mov rf27, r5 ; ldvary.r2 Here, the MOV in the last instruction is supposed to read r5 produced from ldvary.r0, but because we have inserted the bu instruction in between now that read happens at the same time that ldvary.r1 updates r5, stomping the value we were supposed to read. Fix this by disallowing injection of a branch instruction in between an ldvary instruction and its write to the r5 register 2 instructions later. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7062 Reviewed-by: Alejandro Piñeiro cc: mesa-stable Part-of: --- src/broadcom/compiler/qpu_schedule.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/broadcom/compiler/qpu_schedule.c b/src/broadcom/compiler/qpu_schedule.c index 4b9a01fda8f..517c9eb5741 100644 --- a/src/broadcom/compiler/qpu_schedule.c +++ b/src/broadcom/compiler/qpu_schedule.c @@ -1953,6 +1953,14 @@ emit_branch(struct v3d_compile *c, break; } + /* Do not move up a branch if it can disrupt an ldvary sequence + * as that can cause stomping of the r5 register. + */ + if (scoreboard->last_ldvary_tick + 2 >= + branch_tick - slots_filled) { + break; + } + /* Can't move a conditional branch before the instruction * that writes the flags for its condition. */