diff --git a/src/asahi/compiler/agx_opcodes.py b/src/asahi/compiler/agx_opcodes.py
index b2e540bf4c8..b33c473f1ef 100644
--- a/src/asahi/compiler/agx_opcodes.py
+++ b/src/asahi/compiler/agx_opcodes.py
@@ -172,6 +172,10 @@ op("device_load",
 op("wait", (0x38, 0xFF, 2, _), dests = 0,
       can_eliminate = False, imms = [SCOREBOARD])
 
+# Essentially same encoding
+op("ld_tile", (0x49, 0x7F, 8, _), dests = 1, srcs = 0,
+      can_eliminate = False, imms = [FORMAT])
+
 op("st_tile", (0x09, 0x7F, 8, _), dests = 0, srcs = 1,
       can_eliminate = False, imms = [FORMAT])
 
diff --git a/src/asahi/compiler/agx_pack.c b/src/asahi/compiler/agx_pack.c
index 953c7af697e..cdf31224812 100644
--- a/src/asahi/compiler/agx_pack.c
+++ b/src/asahi/compiler/agx_pack.c
@@ -356,18 +356,22 @@ static void
 agx_pack_instr(struct util_dynarray *emission, agx_instr *I)
 {
    switch (I->op) {
+   case AGX_OPCODE_LD_TILE:
    case AGX_OPCODE_ST_TILE:
    {
-      unsigned D = agx_pack_alu_dst(I->src[0]);
+      bool load = (I->op == AGX_OPCODE_LD_TILE);
+      unsigned D = agx_pack_alu_dst(load ? I->dest[0] : I->src[0]);
       unsigned rt = 0; /* TODO */
       unsigned mask = I->mask ?: 0xF;
       assert(mask < 0x10);
 
       uint64_t raw =
          0x09 |
+         (load ? (1 << 6) : 0) |
          ((uint64_t) (D & BITFIELD_MASK(8)) << 7) |
          ((uint64_t) (I->format) << 24) |
          ((uint64_t) (rt) << 32) |
+         (load ? (1ull << 35) : 0) |
          ((uint64_t) (mask) << 36) |
          ((uint64_t) 0x0380FC << 40) |
          (((uint64_t) (D >> 8)) << 60);
diff --git a/src/asahi/compiler/agx_register_allocate.c b/src/asahi/compiler/agx_register_allocate.c
index 5e4760328d9..6f9b90e0194 100644
--- a/src/asahi/compiler/agx_register_allocate.c
+++ b/src/asahi/compiler/agx_register_allocate.c
@@ -90,7 +90,7 @@ agx_ra(agx_context *ctx)
             unsigned size = ins->dest[d].size == AGX_SIZE_32 ? 2 : 1;
             if (size == 2 && usage & 1) usage++;
             unsigned v = usage;
-            unsigned comps = (ins->op == AGX_OPCODE_LD_VARY || ins->op == AGX_OPCODE_DEVICE_LOAD || ins->op == AGX_OPCODE_TEXTURE_SAMPLE) ? 4 : 1; // todo systematic
+            unsigned comps = (ins->op == AGX_OPCODE_LD_VARY || ins->op == AGX_OPCODE_DEVICE_LOAD || ins->op == AGX_OPCODE_TEXTURE_SAMPLE || ins->op == AGX_OPCODE_LD_TILE) ? 4 : 1; // todo systematic
             usage += comps * size;
             alloc[ins->dest[d].value] = v;
             ins->dest[d] = agx_replace_index(ins->dest[d], agx_register(v, ins->dest[d].size));