From 1098afd7fbe11a6fd40d4ade2431ffa7017ab097 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Tue, 8 Nov 2022 15:35:09 +1100 Subject: [PATCH] gallium: add PIPE_CAP_FP16 for AMD_gpu_shader_half_float MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Marek Olšák Part-of: --- docs/gallium/screen.rst | 1 + src/gallium/auxiliary/util/u_screen.c | 1 + src/gallium/include/pipe/p_defines.h | 1 + src/mesa/state_tracker/st_extensions.c | 1 + 4 files changed, 4 insertions(+) diff --git a/docs/gallium/screen.rst b/docs/gallium/screen.rst index 5c668aec4f1..c4f0881f341 100644 --- a/docs/gallium/screen.rst +++ b/docs/gallium/screen.rst @@ -426,6 +426,7 @@ The integer capabilities: * ``PIPE_CAP_LEGACY_MATH_RULES``: Whether NIR shaders support the ``shader_info.use_legacy_math_rules`` flag (see documentation there), and TGSI shaders support the corresponding ``TGSI_PROPERTY_LEGACY_MATH_RULES``. +* ``PIPE_CAP_FP16``: Whether 16-bit float operations are supported. * ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations are supported. * ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported. diff --git a/src/gallium/auxiliary/util/u_screen.c b/src/gallium/auxiliary/util/u_screen.c index df9a7c0ab7f..78cc8d9bb3f 100644 --- a/src/gallium/auxiliary/util/u_screen.c +++ b/src/gallium/auxiliary/util/u_screen.c @@ -332,6 +332,7 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen, case PIPE_CAP_FBFETCH_ZS: case PIPE_CAP_BLEND_EQUATION_ADVANCED: case PIPE_CAP_LEGACY_MATH_RULES: + case PIPE_CAP_FP16: case PIPE_CAP_DOUBLES: case PIPE_CAP_INT64: case PIPE_CAP_TGSI_TEX_TXF_LZ: diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index 1dea74ea2e0..f96b1073189 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -808,6 +808,7 @@ enum pipe_cap PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS, PIPE_CAP_FBFETCH, PIPE_CAP_LEGACY_MATH_RULES, + PIPE_CAP_FP16, PIPE_CAP_DOUBLES, PIPE_CAP_INT64, PIPE_CAP_TGSI_TEX_TXF_LZ, diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 5e76a8bd1fc..91d593dfc90 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -849,6 +849,7 @@ void st_init_extensions(struct pipe_screen *screen, { o(AMD_depth_clamp_separate), PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE }, { o(AMD_framebuffer_multisample_advanced), PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS }, + { o(AMD_gpu_shader_half_float), PIPE_CAP_FP16 }, { o(AMD_performance_monitor), PIPE_CAP_PERFORMANCE_MONITOR }, { o(AMD_pinned_memory), PIPE_CAP_RESOURCE_FROM_USER_MEMORY }, { o(ATI_meminfo), PIPE_CAP_QUERY_MEMORY_INFO },