radv: Fill task shader info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929>
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@@ -3494,6 +3494,16 @@ radv_declare_pipeline_args(struct radv_device *device, struct radv_pipeline_stag
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stages[i].info.user_sgprs_locs = stages[i].args.user_sgprs_locs;
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stages[i].info.inline_push_constant_mask = stages[i].args.ac.inline_push_const_mask;
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}
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if (stages[MESA_SHADER_TASK].nir) {
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/* Task/mesh I/O uses the task ring buffers. */
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stages[MESA_SHADER_TASK].info.cs.uses_task_rings = true;
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stages[MESA_SHADER_MESH].info.cs.uses_task_rings = true;
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stages[MESA_SHADER_TASK].info.workgroup_size =
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ac_compute_cs_workgroup_size(
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stages[MESA_SHADER_TASK].nir->info.workgroup_size, false, UINT32_MAX);
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}
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}
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static void
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@@ -2327,7 +2327,7 @@ radv_get_max_waves(const struct radv_device *device, struct radv_shader *shader,
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lds_per_wave =
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conf->lds_size * info->lds_encode_granularity + shader->info.ps.num_interp * 48;
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lds_per_wave = align(lds_per_wave, info->lds_alloc_granularity);
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} else if (stage == MESA_SHADER_COMPUTE) {
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} else if (stage == MESA_SHADER_COMPUTE || stage == MESA_SHADER_TASK) {
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unsigned max_workgroup_size = shader->info.workgroup_size;
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lds_per_wave =
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align(conf->lds_size * info->lds_encode_granularity, info->lds_alloc_granularity);
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@@ -345,6 +345,7 @@ struct radv_shader_info {
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bool uses_sbt;
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bool uses_ray_launch_size;
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bool uses_task_rings;
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} cs;
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struct {
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uint64_t tes_inputs_read;
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@@ -590,9 +590,25 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
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BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_NUM_SUBGROUPS);
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switch (nir->info.stage) {
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case MESA_SHADER_COMPUTE:
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case MESA_SHADER_TASK:
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for (int i = 0; i < 3; ++i)
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info->cs.block_size[i] = nir->info.workgroup_size[i];
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info->cs.uses_ray_launch_size = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_RAY_LAUNCH_SIZE);
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/* Task shaders always need these for the I/O lowering even if
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* the API shader doesn't actually use them.
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*/
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if (nir->info.stage == MESA_SHADER_TASK) {
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/* Needed to address the IB to read firstTask. */
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info->vs.needs_draw_id |=
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BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_WORKGROUP_ID);
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/* Needed to address the task draw/payload rings. */
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info->cs.uses_block_id[0] = true;
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/* Needed for storing draw ready only on the 1st thread. */
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info->cs.uses_local_invocation_idx = true;
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}
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break;
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case MESA_SHADER_FRAGMENT:
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info->ps.can_discard = nir->info.fs.uses_discard;
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