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agx: Add schedule-specialized get_sr variants

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Some special registers imply scheduling constraints. We want to have a single
scheduling class per instruction in the IR, so fork off various get_sr variants
depending on what kind of SR we're reading, and validate that we use the right
kind.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25052>
This commit is contained in:
Alyssa Rosenzweig
2023-08-24 19:19:07 -04:00
committed by Marge Bot
parent f6df092925
commit 0ea47d86c7
3 changed files with 41 additions and 5 deletions
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8
src/asahi/compiler/agx_compile.c
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@@ -1038,15 +1038,15 @@ agx_emit_intrinsic(agx_builder *b, nir_intrinsic_instr *instr)
return agx_get_sr_to(b, dst, AGX_SR_INPUT_SAMPLE_MASK);
case nir_intrinsic_load_sample_mask:
return agx_get_sr_to(b, dst, AGX_SR_COVERAGE_MASK);
return agx_get_sr_coverage_to(b, dst, AGX_SR_COVERAGE_MASK);
case nir_intrinsic_load_helper_invocation:
/* Compare special register to zero. We could lower this in NIR (letting
* us fold in an inot) but meh?
*/
return agx_icmpsel_to(b, dst, agx_get_sr(b, 32, AGX_SR_IS_ACTIVE_THREAD),
agx_zero(), agx_immediate(1), agx_zero(),
AGX_ICOND_UEQ);
return agx_icmpsel_to(
b, dst, agx_get_sr_coverage(b, 32, AGX_SR_IS_ACTIVE_THREAD),
agx_zero(), agx_immediate(1), agx_zero(), AGX_ICOND_UEQ);
case nir_intrinsic_load_vertex_id:
assert(b->shader->stage == MESA_SHADER_VERTEX);