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radeonsi: properly set SPI_SHADER_PGM_HI_ES

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When not using S_00B324_MEM_BASE the value isn't properly truncated.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9277>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2021-02-23 11:08:20 +01:00
committed by Marge Bot
parent 6e6e71ddf9
commit 0e97d817f5
1 changed files with 1 additions and 1 deletions
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src/gallium/drivers/radeonsi/si_state_shaders.c
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@@ -1172,7 +1172,7 @@ static void gfx10_shader_ngg(struct si_screen *sscreen, struct si_shader *shader
unsigned wave_size = si_get_shader_wave_size(shader);
si_pm4_set_reg(pm4, R_00B320_SPI_SHADER_PGM_LO_ES, va >> 8);
si_pm4_set_reg(pm4, R_00B324_SPI_SHADER_PGM_HI_ES, va >> 40);
si_pm4_set_reg(pm4, R_00B324_SPI_SHADER_PGM_HI_ES, S_00B324_MEM_BASE(va >> 40));
si_pm4_set_reg(
pm4, R_00B228_SPI_SHADER_PGM_RSRC1_GS,
S_00B228_VGPRS((shader->config.num_vgprs - 1) / (wave_size == 32 ? 8 : 4)) |