OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

i965/blorp: Loosen assertions in compute_msaa_layout_for_pipeline.

Browse Source 
Previously, on Gen7, compute_msaa_layout_for_pipeline() would verify
that IMS layout is not used.  However, now that we configure
SURFACE_STATE correctly for IMS surfaces, IMS layout is available.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
This commit is contained in:
Paul Berry
2012-07-09 12:50:31 -07:00
parent 989218b980
commit 0dd5e98aa5
1 changed files with 2 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
View File

@@ -1432,20 +1432,15 @@ compute_msaa_layout_for_pipeline(struct brw_context *brw, unsigned num_samples,
assert(true_layout == INTEL_MSAA_LAYOUT_NONE || assert(true_layout == INTEL_MSAA_LAYOUT_NONE ||
true_layout == INTEL_MSAA_LAYOUT_IMS); true_layout == INTEL_MSAA_LAYOUT_IMS);
return INTEL_MSAA_LAYOUT_NONE; return INTEL_MSAA_LAYOUT_NONE;
} else {
assert(true_layout != INTEL_MSAA_LAYOUT_NONE);
} }
/* Prior to Gen7, all MSAA surfaces use IMS layout. */ /* Prior to Gen7, all MSAA surfaces use IMS layout. */
if (brw->intel.gen == 6) { if (brw->intel.gen == 6) {
assert(true_layout == INTEL_MSAA_LAYOUT_IMS); assert(true_layout == INTEL_MSAA_LAYOUT_IMS);
return INTEL_MSAA_LAYOUT_IMS;
} }
/* Since blorp uses color textures and render targets to do all its work
* (even when blitting stencil and depth data), we always have to configure
* the Gen7 GPU to use UMS or CMS layout on Gen7.
*/
assert(true_layout == INTEL_MSAA_LAYOUT_UMS ||
true_layout == INTEL_MSAA_LAYOUT_CMS);
return true_layout; return true_layout;
} }