brw: don't forget the base when emitting SHADER_OPCODE_MOV_RELOC_IMM
The last argument seems to be used as brw_shader_reloc::delta (from brw_add_reloc), and we're unconditionally setting it to 0 here, while the other place where we handle nir_intrinsic_load_reloc_const_intel seems to be setting the base appropriately. I found this by inspection while debugging a bug related to this code, so I'm not aware of any workloads that get improved by this patch. Related patches: -ecbec25e84
("intel/nir: add reloc delta to load_reloc_const_intel intrinsic") -99047451c9
("intel/fs: add plumbing for embedded samplers") Fixes:ecbec25e84
("intel/nir: add reloc delta to load_reloc_const_intel intrinsic") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32531>
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@@ -4936,10 +4936,11 @@ try_rebuild_source(nir_to_brw_state &ntb, const brw::fs_builder &bld,
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case nir_intrinsic_load_reloc_const_intel: {
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uint32_t id = nir_intrinsic_param_idx(intrin);
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uint32_t base = nir_intrinsic_base(intrin);
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brw_reg dst = ubld.vgrf(BRW_TYPE_D);
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ntb.resource_insts[def->index] =
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ubld.emit(SHADER_OPCODE_MOV_RELOC_IMM, dst,
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brw_imm_ud(id), brw_imm_ud(0));
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brw_imm_ud(id), brw_imm_ud(base));
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break;
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}
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