anv/pipeline: Add shader lowering for multiview
v2 (Jason Ekstrand): - Take a view_mask rather than a whole subpass - Build the view mask into the VS shader key Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
This commit is contained in:
@@ -197,6 +197,7 @@ VULKAN_FILES := \
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vulkan/anv_nir.h \
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vulkan/anv_nir_apply_pipeline_layout.c \
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vulkan/anv_nir_lower_input_attachments.c \
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vulkan/anv_nir_lower_multiview.c \
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vulkan/anv_nir_lower_push_constants.c \
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vulkan/anv_pass.c \
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vulkan/anv_pipeline.c \
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@@ -35,6 +35,8 @@ void anv_nir_lower_input_attachments(nir_shader *shader);
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void anv_nir_lower_push_constants(nir_shader *shader);
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bool anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask);
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void anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
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nir_shader *shader,
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struct brw_stage_prog_data *prog_data,
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234
src/intel/vulkan/anv_nir_lower_multiview.c
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234
src/intel/vulkan/anv_nir_lower_multiview.c
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@@ -0,0 +1,234 @@
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/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "anv_nir.h"
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#include "nir/nir_builder.h"
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/**
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* This file implements the lowering required for VK_KHR_multiview. We
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* implement multiview using instanced rendering. The number of instances in
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* each draw call is multiplied by the number of views in the subpass. Then,
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* in the shader, we divide gl_InstanceId by the number of views and use
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* gl_InstanceId % view_count to compute the actual ViewIndex.
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*/
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struct lower_multiview_state {
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nir_builder builder;
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uint32_t view_mask;
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nir_ssa_def *instance_id;
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nir_ssa_def *view_index;
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};
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static nir_ssa_def *
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build_instance_id(struct lower_multiview_state *state)
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{
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assert(state->builder.shader->stage == MESA_SHADER_VERTEX);
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if (state->instance_id == NULL) {
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nir_builder *b = &state->builder;
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b->cursor = nir_before_block(nir_start_block(b->impl));
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/* We use instancing for implementing multiview. The actual instance id
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* is given by dividing instance_id by the number of views in this
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* subpass.
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*/
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state->instance_id =
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nir_idiv(b, nir_load_instance_id(b),
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nir_imm_int(b, _mesa_bitcount(state->view_mask)));
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}
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return state->instance_id;
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}
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static nir_ssa_def *
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build_view_index(struct lower_multiview_state *state)
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{
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if (state->view_index == NULL) {
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nir_builder *b = &state->builder;
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b->cursor = nir_before_block(nir_start_block(b->impl));
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assert(state->view_mask != 0);
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if (0 && _mesa_bitcount(state->view_mask) == 1) {
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state->view_index = nir_imm_int(b, ffs(state->view_mask) - 1);
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} else if (state->builder.shader->stage == MESA_SHADER_VERTEX) {
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/* We only support 16 viewports */
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assert((state->view_mask & 0xffff0000) == 0);
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/* We use instancing for implementing multiview. The compacted view
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* id is given by instance_id % view_count. We then have to convert
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* that to an actual view id.
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*/
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nir_ssa_def *compacted =
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nir_umod(b, nir_load_instance_id(b),
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nir_imm_int(b, _mesa_bitcount(state->view_mask)));
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if (0 && util_is_power_of_two(state->view_mask + 1)) {
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/* If we have a full view mask, then compacted is what we want */
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state->view_index = compacted;
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} else {
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/* Now we define a map from compacted view index to the actual
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* view index that's based on the view_mask. The map is given by
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* 16 nibbles, each of which is a value from 0 to 15.
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*/
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uint64_t remap = 0;
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uint32_t bit, i = 0;
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for_each_bit(bit, state->view_mask) {
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assert(bit < 16);
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remap |= (uint64_t)bit << (i++ * 4);
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}
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nir_ssa_def *shift = nir_imul(b, compacted, nir_imm_int(b, 4));
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/* One of these days, when we have int64 everywhere, this will be
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* easier.
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*/
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nir_ssa_def *shifted;
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if (remap <= UINT32_MAX) {
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shifted = nir_ushr(b, nir_imm_int(b, remap), shift);
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} else {
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nir_ssa_def *shifted_low =
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nir_ushr(b, nir_imm_int(b, remap), shift);
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nir_ssa_def *shifted_high =
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nir_ushr(b, nir_imm_int(b, remap >> 32),
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nir_isub(b, shift, nir_imm_int(b, 32)));
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shifted = nir_bcsel(b, nir_ilt(b, shift, nir_imm_int(b, 32)),
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shifted_low, shifted_high);
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}
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state->view_index = nir_iand(b, shifted, nir_imm_int(b, 0xf));
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}
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} else {
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const struct glsl_type *type = glsl_int_type();
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if (b->shader->stage == MESA_SHADER_TESS_CTRL ||
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b->shader->stage == MESA_SHADER_GEOMETRY)
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type = glsl_array_type(type, 1);
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nir_variable *idx_var =
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nir_variable_create(b->shader, nir_var_shader_in,
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type, "view index");
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idx_var->data.location = VARYING_SLOT_VIEW_INDEX;
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if (b->shader->stage == MESA_SHADER_FRAGMENT)
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idx_var->data.interpolation = INTERP_MODE_FLAT;
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if (glsl_type_is_array(type)) {
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nir_deref_var *deref = nir_deref_var_create(b->shader, idx_var);
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nir_deref_array *arr = nir_deref_array_create(b->shader);
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arr->deref.type = glsl_int_type();
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arr->deref_array_type = nir_deref_array_type_direct;
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arr->base_offset = 0;
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deref->deref.child = &arr->deref;
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state->view_index = nir_load_deref_var(b, deref);
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} else {
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state->view_index = nir_load_var(b, idx_var);
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}
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}
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}
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return state->view_index;
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}
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bool
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anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask)
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{
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assert(shader->stage != MESA_SHADER_COMPUTE);
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/* If multiview isn't enabled, we have nothing to do. */
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if (view_mask == 0)
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return false;
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struct lower_multiview_state state = {
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.view_mask = view_mask,
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};
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/* This pass assumes a single entrypoint */
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nir_function_impl *entrypoint = nir_shader_get_entrypoint(shader);
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nir_builder_init(&state.builder, entrypoint);
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bool progress = false;
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nir_foreach_block(block, entrypoint) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *load = nir_instr_as_intrinsic(instr);
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if (load->intrinsic != nir_intrinsic_load_instance_id &&
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load->intrinsic != nir_intrinsic_load_view_index)
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continue;
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assert(load->dest.is_ssa);
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nir_ssa_def *value;
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if (load->intrinsic == nir_intrinsic_load_instance_id) {
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value = build_instance_id(&state);
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} else {
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assert(load->intrinsic == nir_intrinsic_load_view_index);
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value = build_view_index(&state);
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}
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nir_ssa_def_rewrite_uses(&load->dest.ssa, nir_src_for_ssa(value));
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nir_instr_remove(&load->instr);
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progress = true;
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}
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}
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/* The view index is available in all stages but the instance id is only
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* available in the VS. If it's not a fragment shader, we need to pass
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* the view index on to the next stage.
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*/
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if (shader->stage != MESA_SHADER_FRAGMENT) {
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nir_ssa_def *view_index = build_view_index(&state);
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nir_builder *b = &state.builder;
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assert(view_index->parent_instr->block == nir_start_block(entrypoint));
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b->cursor = nir_after_instr(view_index->parent_instr);
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nir_variable *view_index_out =
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nir_variable_create(shader, nir_var_shader_out,
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glsl_int_type(), "view index");
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view_index_out->data.location = VARYING_SLOT_VIEW_INDEX;
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nir_store_var(b, view_index_out, view_index, 0x1);
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nir_variable *layer_id_out =
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nir_variable_create(shader, nir_var_shader_out,
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glsl_int_type(), "layer ID");
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layer_id_out->data.location = VARYING_SLOT_LAYER;
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nir_store_var(b, layer_id_out, view_index, 0x1);
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progress = true;
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}
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if (progress) {
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nir_metadata_preserve(entrypoint, nir_metadata_block_index |
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nir_metadata_dominance);
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}
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return progress;
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}
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@@ -339,6 +339,10 @@ anv_pipeline_hash_shader(struct anv_pipeline *pipeline,
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struct mesa_sha1 ctx;
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_mesa_sha1_init(&ctx);
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if (stage != MESA_SHADER_COMPUTE) {
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_mesa_sha1_update(&ctx, &pipeline->subpass->view_mask,
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sizeof(pipeline->subpass->view_mask));
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}
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if (pipeline->layout) {
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_mesa_sha1_update(&ctx, pipeline->layout->sha1,
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sizeof(pipeline->layout->sha1));
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@@ -372,6 +376,9 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
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NIR_PASS_V(nir, anv_nir_lower_push_constants);
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if (stage != MESA_SHADER_COMPUTE)
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NIR_PASS_V(nir, anv_nir_lower_multiview, pipeline->subpass->view_mask);
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nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
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/* Figure out the number of parameters */
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