radv: write the alpha channel of MRT0 when alpha coverage is enabled
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109597 Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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@@ -511,6 +511,13 @@ radv_pipeline_compute_spi_color_formats(struct radv_pipeline *pipeline,
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if (subpass->color_attachments[i].attachment == VK_ATTACHMENT_UNUSED) {
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if (subpass->color_attachments[i].attachment == VK_ATTACHMENT_UNUSED) {
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cf = V_028714_SPI_SHADER_ZERO;
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cf = V_028714_SPI_SHADER_ZERO;
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if (blend->need_src_alpha & (1 << i)) {
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/* Write the alpha channel of MRT0 when alpha coverage is
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* enabled because the depth attachment needs it.
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*/
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col_format |= V_028714_SPI_SHADER_32_ABGR;
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}
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} else {
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} else {
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struct radv_render_pass_attachment *attachment = pass->attachments + subpass->color_attachments[i].attachment;
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struct radv_render_pass_attachment *attachment = pass->attachments + subpass->color_attachments[i].attachment;
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bool blend_enable =
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bool blend_enable =
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@@ -689,6 +696,7 @@ radv_pipeline_init_blend_state(struct radv_pipeline *pipeline,
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if (vkms && vkms->alphaToCoverageEnable) {
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if (vkms && vkms->alphaToCoverageEnable) {
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blend.db_alpha_to_mask |= S_028B70_ALPHA_TO_MASK_ENABLE(1);
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blend.db_alpha_to_mask |= S_028B70_ALPHA_TO_MASK_ENABLE(1);
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blend.need_src_alpha |= 0x1;
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}
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}
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blend.cb_target_mask = 0;
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blend.cb_target_mask = 0;
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