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intel/compiler: Prepare disasm for 16-bit sampler params

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v2:
- Update descriptor helper (Jason)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11766>
This commit is contained in:
Sagar Ghuge
2021-09-21 16:16:51 -07:00
parent 2fa68cb7da
commit 0d0eae07be
2 changed files with 15 additions and 4 deletions
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8
src/intel/compiler/brw_disasm.c
View File

@@ -613,11 +613,13 @@ static const char *const gfx5_sampler_msg_type[] = {
[GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss", [GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
}; };
static const char *const gfx5_sampler_simd_mode[4] = { static const char *const gfx5_sampler_simd_mode[7] = {
[BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2", [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
[BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8", [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
[BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16", [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
[BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64", [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
[GFX10_SAMPLER_SIMD_MODE_SIMD8H] = "SIMD8H",
[GFX10_SAMPLER_SIMD_MODE_SIMD16H] = "SIMD16H",
}; };
static const char *const sampler_target_format[4] = { static const char *const sampler_target_format[4] = {
@@ -2092,6 +2094,10 @@ brw_disassemble_inst(FILE *file, const struct intel_device_info *devinfo,
err |= control(file, "sampler simd mode", gfx5_sampler_simd_mode, err |= control(file, "sampler simd mode", gfx5_sampler_simd_mode,
brw_sampler_desc_simd_mode(devinfo, imm_desc), brw_sampler_desc_simd_mode(devinfo, imm_desc),
&space); &space);
if (devinfo->ver >= 8 &&
brw_sampler_desc_return_format(devinfo, imm_desc)) {
string(file, " HP");
}
format(file, " Surface = %u Sampler = %u", format(file, " Surface = %u Sampler = %u",
brw_sampler_desc_binding_table_index(devinfo, imm_desc), brw_sampler_desc_binding_table_index(devinfo, imm_desc),
brw_sampler_desc_sampler(devinfo, imm_desc)); brw_sampler_desc_sampler(devinfo, imm_desc));

11
src/intel/compiler/brw_eu.h
View File

@@ -452,7 +452,9 @@ brw_sampler_desc_simd_mode(const struct intel_device_info *devinfo,
uint32_t desc) uint32_t desc)
{ {
assert(devinfo->ver >= 5); assert(devinfo->ver >= 5);
if (devinfo->ver >= 7) if (devinfo->ver >= 8)
return GET_BITS(desc, 18, 17) | GET_BITS(desc, 29, 29) << 2;
else if (devinfo->ver >= 7)
return GET_BITS(desc, 18, 17); return GET_BITS(desc, 18, 17);
else else
return GET_BITS(desc, 17, 16); return GET_BITS(desc, 17, 16);
@@ -462,8 +464,11 @@ static inline unsigned
brw_sampler_desc_return_format(ASSERTED const struct intel_device_info *devinfo, brw_sampler_desc_return_format(ASSERTED const struct intel_device_info *devinfo,
uint32_t desc) uint32_t desc)
{ {
assert(devinfo->verx10 == 40); assert(devinfo->verx10 == 40 || devinfo->ver >= 8);
return GET_BITS(desc, 13, 12); if (devinfo->ver >= 8)
return GET_BITS(desc, 30, 30);
else
return GET_BITS(desc, 13, 12);
} }
/** /**