radv: fix handling primitive ID and clip/cull distances with GPL
When compiling the pre-rasterization stages with GPL, we can't know if the fragment shader reads the primitive ID or the clip/cull distances as inputs and we have to export them unconditionally. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18699>
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@@ -2170,14 +2170,20 @@ radv_should_export_implicit_primitive_id(const struct radv_pipeline_stage *produ
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const struct radv_pipeline_stage *consumer)
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{
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/* When the primitive ID is read by FS, we must ensure that it's exported by the previous vertex
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* stage because it's implicit for VS or TES (but required by the Vulkan spec for GS or MS). Note
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* that when the pipeline uses NGG, it's exported later during the lowering pass.
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* stage because it's implicit for VS or TES (but required by the Vulkan spec for GS or MS).
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*
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* There is two situations to handle:
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* - when the next stage is unknown (with graphics pipeline library), the primitive ID is
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* exported unconditionally
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* - when the pipeline uses NGG, the primitive ID is exported during NGG lowering
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*/
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assert(producer->stage == MESA_SHADER_VERTEX || producer->stage == MESA_SHADER_TESS_EVAL);
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return (consumer->stage == MESA_SHADER_FRAGMENT &&
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(consumer->nir->info.inputs_read & VARYING_BIT_PRIMITIVE_ID) &&
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!(producer->nir->info.outputs_written & VARYING_BIT_PRIMITIVE_ID) &&
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!producer->info.is_ngg);
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if ((producer->nir->info.outputs_written & VARYING_BIT_PRIMITIVE_ID) || producer->info.is_ngg)
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return false;
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return !consumer || (consumer->stage == MESA_SHADER_FRAGMENT &&
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(consumer->nir->info.inputs_read & VARYING_BIT_PRIMITIVE_ID));
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}
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static bool
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@@ -2485,15 +2491,15 @@ radv_pipeline_link_vs(const struct radv_device *device, struct radv_pipeline_sta
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{
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assert(vs_stage->nir->info.stage == MESA_SHADER_VERTEX);
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if (radv_should_export_implicit_primitive_id(vs_stage, next_stage)) {
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NIR_PASS(_, vs_stage->nir, radv_export_implicit_primitive_id);
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}
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if (next_stage) {
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assert(next_stage->nir->info.stage == MESA_SHADER_TESS_CTRL ||
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next_stage->nir->info.stage == MESA_SHADER_GEOMETRY ||
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next_stage->nir->info.stage == MESA_SHADER_FRAGMENT);
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if (radv_should_export_implicit_primitive_id(vs_stage, next_stage)) {
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NIR_PASS(_, vs_stage->nir, radv_export_implicit_primitive_id);
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}
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if (radv_should_export_multiview(vs_stage, next_stage, pipeline_key)) {
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NIR_PASS(_, vs_stage->nir, radv_export_multiview);
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}
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@@ -2555,14 +2561,14 @@ radv_pipeline_link_tes(const struct radv_device *device, struct radv_pipeline_st
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{
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assert(tes_stage->nir->info.stage == MESA_SHADER_TESS_EVAL);
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if (radv_should_export_implicit_primitive_id(tes_stage, next_stage)) {
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NIR_PASS(_, tes_stage->nir, radv_export_implicit_primitive_id);
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}
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if (next_stage) {
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assert(next_stage->nir->info.stage == MESA_SHADER_GEOMETRY ||
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next_stage->nir->info.stage == MESA_SHADER_FRAGMENT);
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if (radv_should_export_implicit_primitive_id(tes_stage, next_stage)) {
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NIR_PASS(_, tes_stage->nir, radv_export_implicit_primitive_id);
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}
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if (radv_should_export_multiview(tes_stage, next_stage, pipeline_key)) {
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NIR_PASS(_, tes_stage->nir, radv_export_multiview);
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}
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@@ -1249,11 +1249,13 @@ radv_link_shaders_info(struct radv_device *device,
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struct radv_pipeline_stage *producer, struct radv_pipeline_stage *consumer,
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const struct radv_pipeline_key *pipeline_key)
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{
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/* Export primitive ID or clip/cull distances if necessary. */
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if (consumer && consumer->stage == MESA_SHADER_FRAGMENT) {
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/* Export primitive ID and clip/cull distances if read by the FS, or export unconditionally when
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* the next stage is unknown (with graphics pipeline library).
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*/
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if (!consumer || consumer->stage == MESA_SHADER_FRAGMENT) {
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struct radv_vs_output_info *outinfo = &producer->info.outinfo;
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const bool ps_prim_id_in = consumer->info.ps.prim_id_input;
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const bool ps_clip_dists_in = !!consumer->info.ps.num_input_clips_culls;
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const bool ps_prim_id_in = !consumer || consumer->info.ps.prim_id_input;
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const bool ps_clip_dists_in = !consumer || !!consumer->info.ps.num_input_clips_culls;
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if (ps_prim_id_in &&
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(producer->stage == MESA_SHADER_VERTEX || producer->stage == MESA_SHADER_TESS_EVAL)) {
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