i915g: Use the right shader limits.

src/gallium/drivers/i915/i915_fpc.h

@@ -37,7 +37,7 @@
 
 #include "tgsi/tgsi_parse.h"
 
-#define I915_PROGRAM_SIZE 192
+#define I915_PROGRAM_SIZE (3 * I915_MAX_INSN)
 
 /* Use those indices for pos/face routing, must be >= num of inputs */
 #define I915_SEMANTIC_POS  100

src/gallium/drivers/i915/i915_reg.h

@@ -488,6 +488,10 @@
 #define I915_MAX_DECL_INSN    27
 #define I915_MAX_TEMPORARY    16
 
+#define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
+				I915_MAX_TEX_INSN + \
+				I915_MAX_ALU_INSN)
+
 
 /* Each instruction is 3 dwords long, though most don't require all
  * this space.  Maximum of 123 instructions.  Smaller maxes per insn

src/gallium/drivers/i915/i915_screen.c

@@ -117,11 +117,11 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
       /* XXX: these are just shader model 2.0 values, fix this! */
       switch(cap) {
       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
-         return 96;
+         return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
-         return 64;
+         return I915_MAX_ALU_INSN;
       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
-         return 32;
+         return I915_MAX_TEX_INSN;
       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
          return 8;
       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
@@ -150,7 +150,7 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
       case PIPE_SHADER_CAP_INTEGERS:
          return 0;
       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
-         return 8;
+         return I915_TEX_UNITS;
       default:
          debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
          return 0;