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intel/compiler/xe2: Update fs_visitor::setup_vs_payload to account for Xe2 reg size

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[ Francisco Jerez: Simplify. ]

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
This commit is contained in:
Ian Romanick
2022-08-01 16:42:57 -07:00
committed by Jordan Justen
parent 42b90f05f6
commit 0b23df3951
3 changed files with 12 additions and 5 deletions
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2
src/intel/compiler/brw_fs.cpp
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@@ -6987,7 +6987,7 @@ fs_visitor::run_vs()
{ {
assert(stage == MESA_SHADER_VERTEX); assert(stage == MESA_SHADER_VERTEX);
payload_ = new vs_thread_payload(); payload_ = new vs_thread_payload(*this);
emit_nir_code(); emit_nir_code();

2
src/intel/compiler/brw_fs.h
View File

@@ -98,7 +98,7 @@ protected:
}; };
struct vs_thread_payload : public thread_payload { struct vs_thread_payload : public thread_payload {
vs_thread_payload(); vs_thread_payload(const fs_visitor &v);
fs_reg urb_handles; fs_reg urb_handles;
}; };

13
src/intel/compiler/brw_fs_thread_payload.cpp
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@@ -25,11 +25,18 @@
using namespace brw; using namespace brw;
vs_thread_payload::vs_thread_payload() vs_thread_payload::vs_thread_payload(const fs_visitor &v)
{ {
urb_handles = brw_ud8_grf(1, 0); unsigned r = 0;
num_regs = 2; /* R0: Thread header. */
r += reg_unit(v.devinfo);
/* R1: URB handles. */
urb_handles = brw_ud8_grf(r, 0);
r += reg_unit(v.devinfo);
num_regs = r;
} }
tcs_thread_payload::tcs_thread_payload(const fs_visitor &v) tcs_thread_payload::tcs_thread_payload(const fs_visitor &v)