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pan/bi: Fix the !immediate case in bi_emit_store_vary()

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The base offset was ignored, take it into account.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8469>
This commit is contained in:
Boris Brezillon
2021-01-13 11:18:11 +01:00
committed by Marge Bot
parent f9237619d3
commit 0ad83e3361
3 changed files with 17 additions and 18 deletions
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5
.gitlab-ci/deqp-panfrost-g52-fails.txt
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@@ -1,5 +0,0 @@
dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.9,Fail
dEQP-GLES3.functional.transform_feedback.random.interleaved.points.1,Fail
dEQP-GLES3.functional.transform_feedback.random.interleaved.points.3,Fail
dEQP-GLES3.functional.transform_feedback.random.interleaved.triangles.5,Fail
dEQP-GLES3.functional.transform_feedback.random.interleaved.triangles.9,Fail

3
.gitlab-ci/deqp-panfrost-g52-skips.txt
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@@ -13,6 +13,3 @@ dEQP-GLES[0-9]*.functional.flush_finish.*
# reasons. This needs to be sorted out asap to avoid creating flakes in the near
# future, which would be a Very Bad Thing.
dEQP-GLES2.functional.shaders.indexing.tmp_array.vec3_const_write_dynamic_loop_read_vertex
# This test seems to pass/fail randomly, skip it for now.
dEQP-GLES3.functional.transform_feedback.array_element.interleaved.triangles.mediump_mat2x4

27
src/panfrost/bifrost/bifrost_compile.c
View File

@@ -445,19 +445,26 @@ bi_emit_store_vary(bi_builder *b, nir_intrinsic_instr *instr)
nir_alu_type T = nir_intrinsic_src_type(instr);
enum bi_register_format regfmt = bi_reg_fmt_for_nir(T);
nir_src *offset = nir_get_io_offset_src(instr);
unsigned imm_index = 0;
bool immediate = bi_is_intr_immediate(instr, &imm_index, 16);
bi_index address = immediate ?
bi_lea_attr_imm(b,
bi_register(61), /* TODO RA */
bi_register(62), /* TODO RA */
regfmt, imm_index) :
bi_lea_attr(b,
bi_register(61), /* TODO RA */
bi_register(62), /* TODO RA */
bi_src_index(offset), regfmt);
bi_index address;
if (immediate) {
address = bi_lea_attr_imm(b,
bi_register(61), /* TODO RA */
bi_register(62), /* TODO RA */
regfmt, imm_index);
} else {
bi_index idx =
bi_iadd_u32(b,
bi_src_index(nir_get_io_offset_src(instr)),
bi_imm_u32(nir_intrinsic_base(instr)),
false);
address = bi_lea_attr(b,
bi_register(61), /* TODO RA */
bi_register(62), /* TODO RA */
idx, regfmt);
}
/* Only look at the total components needed. In effect, we fill in all
* the intermediate "holes" in the write mask, since we can't mask off