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anv: Initialize depth_bounds_test_enable when not explicitly set

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This was causing uninitialized value to end up propagated to the
3DSTATE_DEPTH_BOUNDS packet, leading to asserts on packet
building due to the value being greater than 1.

Fixes: 939ddccb7a ("anv: Add support for depth bounds testing.")
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
This commit is contained in:
Caio Marcelo de Oliveira Filho
2019-11-12 10:42:09 -08:00
parent 771d23584a
commit 0aaf47f7cd
1 changed files with 1 additions and 2 deletions
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3
src/intel/vulkan/genX_pipeline.c
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@@ -999,6 +999,7 @@ emit_ds_state(struct anv_pipeline *pipeline,
pipeline->stencil_test_enable = false; pipeline->stencil_test_enable = false;
pipeline->writes_depth = false; pipeline->writes_depth = false;
pipeline->depth_test_enable = false; pipeline->depth_test_enable = false;
pipeline->depth_bounds_test_enable = false;
memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw)); memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw));
return; return;
} }
@@ -1017,8 +1018,6 @@ emit_ds_state(struct anv_pipeline *pipeline,
pipeline->depth_test_enable = info.depthTestEnable; pipeline->depth_test_enable = info.depthTestEnable;
pipeline->depth_bounds_test_enable = info.depthBoundsTestEnable; pipeline->depth_bounds_test_enable = info.depthBoundsTestEnable;
/* VkBool32 depthBoundsTestEnable; // optional (depth_bounds_test) */
#if GEN_GEN <= 7 #if GEN_GEN <= 7
struct GENX(DEPTH_STENCIL_STATE) depth_stencil = { struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
#else #else