gallium: Cleanup predicate and condition code TGSI tokens.
There is little point in having a special TGSI token just to handle predicate register updates. Remove tgsi_dst_register_ext_predicate token and instead use a new PREDICATE register file to update predicates. Actually, the contents of the obsolete token are being moved to tgsi_instruction_ext_predicate, where they should be from the very beginning. Remove the NVIDIA-specific condition code tokens -- nobody uses them and they can be emulated with predicates if needed. Introduce PIPE_CAP_SM3 that indicates whether a driver supports SM3-level instructions, and in particular predicates. Add PIPE_CAP_MAX_PREDICATE_REGISTERS that can be used to query the driver how many predicate registers it supports (currently it would be 1).
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@@ -1,6 +1,7 @@
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/**************************************************************************
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*
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* Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
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* Copyright 2009 VMware, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -25,8 +26,8 @@
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*
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**************************************************************************/
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#ifndef TGSI_TOKEN_H
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#define TGSI_TOKEN_H
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#ifndef P_SHADER_TOKENS_H
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#define P_SHADER_TOKENS_H
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#ifdef __cplusplus
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extern "C" {
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@@ -79,6 +80,7 @@ enum tgsi_file_type {
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TGSI_FILE_ADDRESS =6,
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TGSI_FILE_IMMEDIATE =7,
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TGSI_FILE_LOOP =8,
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TGSI_FILE_PREDICATE =9,
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TGSI_FILE_COUNT /**< how many TGSI_FILE_ types */
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};
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@@ -319,7 +321,6 @@ struct tgsi_instruction
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* instruction, including the instruction word.
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*/
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#define TGSI_INSTRUCTION_EXT_TYPE_NV 0
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#define TGSI_INSTRUCTION_EXT_TYPE_LABEL 1
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#define TGSI_INSTRUCTION_EXT_TYPE_TEXTURE 2
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#define TGSI_INSTRUCTION_EXT_TYPE_PREDICATE 3
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@@ -332,9 +333,6 @@ struct tgsi_instruction_ext
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};
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/*
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* If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_NV, it should
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* be cast to tgsi_instruction_ext_nv.
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*
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* If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_LABEL, it
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* should be cast to tgsi_instruction_ext_label.
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*
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@@ -348,56 +346,11 @@ struct tgsi_instruction_ext
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* follows.
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*/
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#define TGSI_PRECISION_DEFAULT 0
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#define TGSI_PRECISION_FLOAT32 1
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#define TGSI_PRECISION_FLOAT16 2
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#define TGSI_PRECISION_FIXED12 3
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#define TGSI_CC_GT 0
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#define TGSI_CC_EQ 1
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#define TGSI_CC_LT 2
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#define TGSI_CC_GE 3
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#define TGSI_CC_LE 4
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#define TGSI_CC_NE 5
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#define TGSI_CC_TR 6
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#define TGSI_CC_FL 7
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#define TGSI_SWIZZLE_X 0
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#define TGSI_SWIZZLE_Y 1
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#define TGSI_SWIZZLE_Z 2
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#define TGSI_SWIZZLE_W 3
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/**
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* Precision controls the precision at which the operation should be executed.
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*
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* CondDstUpdate enables condition code register writes. When this field is
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* TRUE, CondDstIndex specifies the index of the condition code register to
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* update.
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*
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* CondFlowEnable enables conditional execution of the operation. When this
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* field is TRUE, CondFlowIndex specifies the index of the condition code
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* register to test against CondMask with component swizzle controled by
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* CondSwizzleX, CondSwizzleY, CondSwizzleZ and CondSwizzleW. If the test fails,
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* the operation is not executed.
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*/
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struct tgsi_instruction_ext_nv
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{
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unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_NV */
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unsigned Precision : 4; /* TGSI_PRECISION_ */
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unsigned CondDstIndex : 4; /* UINT */
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unsigned CondFlowIndex : 4; /* UINT */
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unsigned CondMask : 4; /* TGSI_CC_ */
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unsigned CondSwizzleX : 2; /* TGSI_SWIZZLE_ */
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unsigned CondSwizzleY : 2; /* TGSI_SWIZZLE_ */
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unsigned CondSwizzleZ : 2; /* TGSI_SWIZZLE_ */
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unsigned CondSwizzleW : 2; /* TGSI_SWIZZLE_ */
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unsigned CondDstUpdate : 1; /* BOOL */
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unsigned CondFlowEnable : 1; /* BOOL */
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unsigned Padding : 1;
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unsigned Extended : 1; /* BOOL */
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};
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struct tgsi_instruction_ext_label
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{
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unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_LABEL */
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@@ -425,13 +378,21 @@ struct tgsi_instruction_ext_texture
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unsigned Extended : 1; /* BOOL */
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};
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/*
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* For SM3, the following constraint applies.
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* - Swizzle is either set to identity or replicate.
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*/
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struct tgsi_instruction_ext_predicate
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{
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unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_PREDICATE */
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unsigned PredDstIndex : 4; /* UINT */
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unsigned PredWriteMask : 4; /* TGSI_WRITEMASK_ */
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unsigned Padding : 19;
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unsigned Extended : 1; /* BOOL */
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unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_PREDICATE */
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unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
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unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
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unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
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unsigned SwizzleW : 2; /* TGSI_SWIZZLE_x */
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unsigned Negate : 1; /* BOOL */
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unsigned SrcIndex : 8; /* UINT */
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unsigned Padding : 10;
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unsigned Extended : 1; /* BOOL */
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};
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/**
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@@ -546,9 +507,7 @@ struct tgsi_dst_register
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* Then, if tgsi_dst_register::Indirect is TRUE, tgsi_src_register follows.
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*/
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#define TGSI_DST_REGISTER_EXT_TYPE_CONDCODE 0
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#define TGSI_DST_REGISTER_EXT_TYPE_MODULATE 1
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#define TGSI_DST_REGISTER_EXT_TYPE_PREDICATE 2
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struct tgsi_dst_register_ext
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{
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@@ -560,30 +519,12 @@ struct tgsi_dst_register_ext
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/**
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* Extra destination register modifiers
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*
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* If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_CONDCODE,
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* it should be cast to tgsi_dst_register_ext_condcode.
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*
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* If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_MODULATE,
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* it should be cast to tgsi_dst_register_ext_modulate.
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*
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* If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_PREDICATE,
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* it should be cast to tgsi_dst_register_ext_predicate.
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*
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* If tgsi_dst_register_ext::Extended is TRUE, another tgsi_dst_register_ext
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* follows.
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*/
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struct tgsi_dst_register_ext_concode
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{
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unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_CONDCODE */
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unsigned CondMask : 4; /* TGSI_CC_ */
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unsigned CondSwizzleX : 2; /* TGSI_SWIZZLE_ */
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unsigned CondSwizzleY : 2; /* TGSI_SWIZZLE_ */
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unsigned CondSwizzleZ : 2; /* TGSI_SWIZZLE_ */
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unsigned CondSwizzleW : 2; /* TGSI_SWIZZLE_ */
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unsigned CondSrcIndex : 4; /* UINT */
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unsigned Padding : 11;
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unsigned Extended : 1; /* BOOL */
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};
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#define TGSI_MODULATE_1X 0
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#define TGSI_MODULATE_2X 1
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@@ -602,30 +543,8 @@ struct tgsi_dst_register_ext_modulate
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unsigned Extended : 1; /* BOOL */
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};
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/*
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* Currently, the following constraints apply.
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*
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* - PredSwizzleXYZW is either set to identity or replicate.
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* - PredSrcIndex is 0.
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*/
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struct tgsi_dst_register_ext_predicate
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{
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unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_PREDICATE */
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unsigned PredSwizzleX : 2; /* TGSI_SWIZZLE_ */
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unsigned PredSwizzleY : 2; /* TGSI_SWIZZLE_ */
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unsigned PredSwizzleZ : 2; /* TGSI_SWIZZLE_ */
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unsigned PredSwizzleW : 2; /* TGSI_SWIZZLE_ */
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unsigned PredSrcIndex : 4; /* UINT */
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unsigned Negate : 1; /* BOOL */
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unsigned Padding : 14;
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unsigned Extended : 1; /* BOOL */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* TGSI_TOKEN_H */
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#endif /* P_SHADER_TOKENS_H */
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