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intel/isl: Build for Xe2

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This is only *build* support in isl for Xe2. Before adding LNL PCI
IDs, subsequent patches will fill in ISL updates for Xe2.

Rework:
 * Rohan: Update isl_genX_declare_get_func

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25253>
This commit is contained in:
Jordan Justen
2022-06-28 14:31:11 -07:00
committed by Marge Bot
parent 961aa68b23
commit 08735fd90d
3 changed files with 9 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/intel/isl/isl.c
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@@ -3115,6 +3115,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
case 125: \
isl_gfx125_##func(__VA_ARGS__); \
break; \
case 200: \
isl_gfx20_##func(__VA_ARGS__); \
break; \
default: \
assert(!"Unknown hardware generation"); \
}

5
src/intel/isl/isl_priv.h
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@@ -77,6 +77,8 @@ typedef void (*isl_emit_cpb_control_s_func)(const struct isl_device *dev, void *
return isl_gfx12_##func; \
case 125: \
return isl_gfx125_##func; \
case 200: \
return isl_gfx20_##func; \
default: \
assert(!"Unknown hardware generation"); \
return NULL; \
@@ -291,6 +293,9 @@ _isl_notify_failure(const struct isl_surf_init_info *surf_info,
# define genX(x) gfx125_##x
# include "isl_genX_priv.h"
# undef genX
# define genX(x) gfx20_##x
# include "isl_genX_priv.h"
# undef genX
#endif
#endif /* ISL_PRIV_H */

2
src/intel/isl/meson.build
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@@ -64,7 +64,7 @@ isl_per_hw_ver_libs = []
foreach g : [['40', isl_gfx4_files], ['50', []], ['60', isl_gfx6_files],
['70', isl_gfx7_files], ['75', []], ['80', isl_gfx8_files],
['90', isl_gfx9_files], ['110', []], ['120', isl_gfx12_files],
['125', isl_gfx12_files]]
['125', isl_gfx12_files], ['200', isl_gfx12_files]]
_gfx_ver = g[0]
isl_per_hw_ver_libs += static_library(
'isl_per_hw_ver@0@'.format(_gfx_ver),