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agx: Rename blend -> st_tile

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For symmetry.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
This commit is contained in:
Alyssa Rosenzweig
2021-05-04 22:44:54 -04:00
parent 06fe6651b3
commit 07fdc0015e
4 changed files with 6 additions and 5 deletions
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3
src/asahi/compiler/agx_compile.c
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@@ -176,8 +176,7 @@ agx_emit_fragment_out(agx_builder *b, nir_intrinsic_instr *instr)
agx_writeout(b, 0xC200); agx_writeout(b, 0xC200);
agx_writeout(b, 0x000C); agx_writeout(b, 0x000C);
/* Emit the blend op itself */ return agx_st_tile(b, agx_src_index(&instr->src[0]),
return agx_blend(b, agx_src_index(&instr->src[0]),
b->shader->key->fs.tib_formats[rt]); b->shader->key->fs.tib_formats[rt]);
} }

4
src/asahi/compiler/agx_opcodes.py
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@@ -172,8 +172,10 @@ op("device_load",
op("wait", (0x38, 0xFF, 2, _), dests = 0, op("wait", (0x38, 0xFF, 2, _), dests = 0,
can_eliminate = False, imms = [SCOREBOARD]) can_eliminate = False, imms = [SCOREBOARD])
op("st_tile", (0x09, 0x7F, 8, _), dests = 0, srcs = 1,
can_eliminate = False, imms = [FORMAT])
op("bitop", (0x7E, 0x7F, 6, _), srcs = 2, imms = [TRUTH_TABLE]) op("bitop", (0x7E, 0x7F, 6, _), srcs = 2, imms = [TRUTH_TABLE])
op("blend", (0x09, 0x7F, 8, _), dests = 0, srcs = 1, imms = [FORMAT], can_eliminate = False)
op("convert", (0x3E | L, 0x7F | L | (0x3 << 38), 6, _), srcs = 2, imms = [ROUND]) op("convert", (0x3E | L, 0x7F | L | (0x3 << 38), 6, _), srcs = 2, imms = [ROUND])
op("ld_vary", (0x21, 0x3F, 8, _), srcs = 1, imms = [CHANNELS]) op("ld_vary", (0x21, 0x3F, 8, _), srcs = 1, imms = [CHANNELS])
op("st_vary", None, dests = 0, srcs = 2, can_eliminate = False) op("st_vary", None, dests = 0, srcs = 2, can_eliminate = False)

2
src/asahi/compiler/agx_optimizer.c
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@@ -169,7 +169,7 @@ agx_optimizer_forward(agx_context *ctx)
agx_optimizer_fmov(defs, I, info.nr_srcs); agx_optimizer_fmov(defs, I, info.nr_srcs);
/* Inline immediates if we can. TODO: systematic */ /* Inline immediates if we can. TODO: systematic */
if (I->op != AGX_OPCODE_ST_VARY && I->op != AGX_OPCODE_BLEND && I->op != AGX_OPCODE_P_EXTRACT && I->op != AGX_OPCODE_P_COMBINE) if (I->op != AGX_OPCODE_ST_VARY && I->op != AGX_OPCODE_ST_TILE && I->op != AGX_OPCODE_P_EXTRACT && I->op != AGX_OPCODE_P_COMBINE)
agx_optimizer_inline_imm(defs, I, info.nr_srcs, info.is_float); agx_optimizer_inline_imm(defs, I, info.nr_srcs, info.is_float);
} }

2
src/asahi/compiler/agx_pack.c
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@@ -356,7 +356,7 @@ static void
agx_pack_instr(struct util_dynarray *emission, agx_instr *I) agx_pack_instr(struct util_dynarray *emission, agx_instr *I)
{ {
switch (I->op) { switch (I->op) {
case AGX_OPCODE_BLEND: case AGX_OPCODE_ST_TILE:
{ {
unsigned D = agx_pack_alu_dst(I->src[0]); unsigned D = agx_pack_alu_dst(I->src[0]);
unsigned rt = 0; /* TODO */ unsigned rt = 0; /* TODO */