radv: do not lower loading TESS/ESGS rings using the ABI for LLVM

LLVM uses an implicit argument for the ring offsets and this lowering
was just broken.

This fixes tessellation and geometry on all generations with LLVM.

Fixes: 896a55f47d ("radv: Lower ABI in NIR for tess/ESGS/NGG shader arguments.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16530>
This commit is contained in:
Samuel Pitoiset
2022-05-16 16:42:22 +02:00
committed by Marge Bot
parent 6b1e73c700
commit 07eba9a15a
5 changed files with 22 additions and 6 deletions

View File

@@ -2014,10 +2014,18 @@ declare_esgs_ring(struct radv_shader_context *ctx)
static LLVMValueRef radv_intrinsic_load(struct ac_shader_abi *abi, nir_intrinsic_op op)
{
struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
switch (op) {
case nir_intrinsic_load_base_vertex:
case nir_intrinsic_load_first_vertex:
return radv_load_base_vertex(abi, op == nir_intrinsic_load_base_vertex);
case nir_intrinsic_load_ring_tess_factors_amd:
return ctx->hs_ring_tess_factor;
case nir_intrinsic_load_ring_tess_offchip_amd:
return ctx->hs_ring_tess_offchip;
case nir_intrinsic_load_ring_esgs_amd:
return ctx->esgs_ring;
default:
return NULL;
}