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radv: cleanup radv_device_finish_meta_XXX() helpers

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Unnecessary to double check that handles are not NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2017-09-28 13:50:56 +02:00
parent 2084629b63
commit 06dbe0722f
8 changed files with 137 additions and 220 deletions
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95
src/amd/vulkan/radv_meta_blit.c
View File

@@ -635,65 +635,48 @@ void radv_CmdBlitImage(
void void
radv_device_finish_meta_blit_state(struct radv_device *device) radv_device_finish_meta_blit_state(struct radv_device *device)
{ {
struct radv_meta_state *state = &device->meta_state;
for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) { for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) {
if (device->meta_state.blit.render_pass[i]) radv_DestroyRenderPass(radv_device_to_handle(device),
radv_DestroyRenderPass(radv_device_to_handle(device), state->blit.render_pass[i],
device->meta_state.blit.render_pass[i], &state->alloc);
&device->meta_state.alloc); radv_DestroyPipeline(radv_device_to_handle(device),
if (device->meta_state.blit.pipeline_1d_src[i]) state->blit.pipeline_1d_src[i],
radv_DestroyPipeline(radv_device_to_handle(device), &state->alloc);
device->meta_state.blit.pipeline_1d_src[i], radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->blit.pipeline_2d_src[i],
if (device->meta_state.blit.pipeline_2d_src[i]) &state->alloc);
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.blit.pipeline_2d_src[i], state->blit.pipeline_3d_src[i],
&device->meta_state.alloc); &state->alloc);
if (device->meta_state.blit.pipeline_3d_src[i])
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.blit.pipeline_3d_src[i],
&device->meta_state.alloc);
} }
if (device->meta_state.blit.depth_only_rp) radv_DestroyRenderPass(radv_device_to_handle(device),
radv_DestroyRenderPass(radv_device_to_handle(device), state->blit.depth_only_rp, &state->alloc);
device->meta_state.blit.depth_only_rp, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->blit.depth_only_1d_pipeline, &state->alloc);
if (device->meta_state.blit.depth_only_1d_pipeline) radv_DestroyPipeline(radv_device_to_handle(device),
radv_DestroyPipeline(radv_device_to_handle(device), state->blit.depth_only_2d_pipeline, &state->alloc);
device->meta_state.blit.depth_only_1d_pipeline, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->blit.depth_only_3d_pipeline, &state->alloc);
if (device->meta_state.blit.depth_only_2d_pipeline)
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyRenderPass(radv_device_to_handle(device),
device->meta_state.blit.depth_only_2d_pipeline, state->blit.stencil_only_rp, &state->alloc);
&device->meta_state.alloc); radv_DestroyPipeline(radv_device_to_handle(device),
if (device->meta_state.blit.depth_only_3d_pipeline) state->blit.stencil_only_1d_pipeline,
radv_DestroyPipeline(radv_device_to_handle(device), &state->alloc);
device->meta_state.blit.depth_only_3d_pipeline, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->blit.stencil_only_2d_pipeline,
if (device->meta_state.blit.stencil_only_rp) &state->alloc);
radv_DestroyRenderPass(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.blit.stencil_only_rp, state->blit.stencil_only_3d_pipeline,
&device->meta_state.alloc); &state->alloc);
if (device->meta_state.blit.stencil_only_1d_pipeline)
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipelineLayout(radv_device_to_handle(device),
device->meta_state.blit.stencil_only_1d_pipeline, state->blit.pipeline_layout, &state->alloc);
&device->meta_state.alloc); radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
if (device->meta_state.blit.stencil_only_2d_pipeline) state->blit.ds_layout, &state->alloc);
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.blit.stencil_only_2d_pipeline,
&device->meta_state.alloc);
if (device->meta_state.blit.stencil_only_3d_pipeline)
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.blit.stencil_only_3d_pipeline,
&device->meta_state.alloc);
if (device->meta_state.blit.pipeline_layout)
radv_DestroyPipelineLayout(radv_device_to_handle(device),
device->meta_state.blit.pipeline_layout,
&device->meta_state.alloc);
if (device->meta_state.blit.ds_layout)
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
device->meta_state.blit.ds_layout,
&device->meta_state.alloc);
} }
static VkFormat pipeline_formats[] = { static VkFormat pipeline_formats[] = {

49
src/amd/vulkan/radv_meta_blit2d.c
View File

@@ -584,48 +584,39 @@ build_nir_copy_fragment_shader_stencil(struct radv_device *device,
void void
radv_device_finish_meta_blit2d_state(struct radv_device *device) radv_device_finish_meta_blit2d_state(struct radv_device *device)
{ {
struct radv_meta_state *state = &device->meta_state;
for(unsigned j = 0; j < NUM_META_FS_KEYS; ++j) { for(unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
if (device->meta_state.blit2d.render_passes[j]) { radv_DestroyRenderPass(radv_device_to_handle(device),
radv_DestroyRenderPass(radv_device_to_handle(device), state->blit2d.render_passes[j],
device->meta_state.blit2d.render_passes[j], &state->alloc);
&device->meta_state.alloc);
}
} }
radv_DestroyRenderPass(radv_device_to_handle(device), radv_DestroyRenderPass(radv_device_to_handle(device),
device->meta_state.blit2d.depth_only_rp, state->blit2d.depth_only_rp, &state->alloc);
&device->meta_state.alloc);
radv_DestroyRenderPass(radv_device_to_handle(device), radv_DestroyRenderPass(radv_device_to_handle(device),
device->meta_state.blit2d.stencil_only_rp, state->blit2d.stencil_only_rp, &state->alloc);
&device->meta_state.alloc);
for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
if (device->meta_state.blit2d.p_layouts[src]) { radv_DestroyPipelineLayout(radv_device_to_handle(device),
radv_DestroyPipelineLayout(radv_device_to_handle(device), state->blit2d.p_layouts[src],
device->meta_state.blit2d.p_layouts[src], &state->alloc);
&device->meta_state.alloc); radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
} state->blit2d.ds_layouts[src],
&state->alloc);
if (device->meta_state.blit2d.ds_layouts[src]) {
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
device->meta_state.blit2d.ds_layouts[src],
&device->meta_state.alloc);
}
for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) { for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
if (device->meta_state.blit2d.pipelines[src][j]) { radv_DestroyPipeline(radv_device_to_handle(device),
radv_DestroyPipeline(radv_device_to_handle(device), state->blit2d.pipelines[src][j],
device->meta_state.blit2d.pipelines[src][j], &state->alloc);
&device->meta_state.alloc);
}
} }
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.blit2d.depth_only_pipeline[src], state->blit2d.depth_only_pipeline[src],
&device->meta_state.alloc); &state->alloc);
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.blit2d.stencil_only_pipeline[src], state->blit2d.stencil_only_pipeline[src],
&device->meta_state.alloc); &state->alloc);
} }
} }

43
src/amd/vulkan/radv_meta_buffer.c
View File

@@ -261,35 +261,22 @@ fail:
void radv_device_finish_meta_buffer_state(struct radv_device *device) void radv_device_finish_meta_buffer_state(struct radv_device *device)
{ {
if (device->meta_state.buffer.copy_pipeline) struct radv_meta_state *state = &device->meta_state;
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.buffer.copy_pipeline,
&device->meta_state.alloc);
if (device->meta_state.buffer.fill_pipeline) radv_DestroyPipeline(radv_device_to_handle(device),
radv_DestroyPipeline(radv_device_to_handle(device), state->buffer.copy_pipeline, &state->alloc);
device->meta_state.buffer.fill_pipeline, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->buffer.fill_pipeline, &state->alloc);
radv_DestroyPipelineLayout(radv_device_to_handle(device),
if (device->meta_state.buffer.copy_p_layout) state->buffer.copy_p_layout, &state->alloc);
radv_DestroyPipelineLayout(radv_device_to_handle(device), radv_DestroyPipelineLayout(radv_device_to_handle(device),
device->meta_state.buffer.copy_p_layout, state->buffer.fill_p_layout, &state->alloc);
&device->meta_state.alloc); radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
state->buffer.copy_ds_layout,
if (device->meta_state.buffer.fill_p_layout) &state->alloc);
radv_DestroyPipelineLayout(radv_device_to_handle(device), radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
device->meta_state.buffer.fill_p_layout, state->buffer.fill_ds_layout,
&device->meta_state.alloc); &state->alloc);
if (device->meta_state.buffer.copy_ds_layout)
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
device->meta_state.buffer.copy_ds_layout,
&device->meta_state.alloc);
if (device->meta_state.buffer.fill_ds_layout)
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
device->meta_state.buffer.fill_ds_layout,
&device->meta_state.alloc);
} }
static void fill_buffer_shader(struct radv_cmd_buffer *cmd_buffer, static void fill_buffer_shader(struct radv_cmd_buffer *cmd_buffer,

96
src/amd/vulkan/radv_meta_bufimage.c
View File

@@ -212,21 +212,15 @@ fail:
static void static void
radv_device_finish_meta_itob_state(struct radv_device *device) radv_device_finish_meta_itob_state(struct radv_device *device)
{ {
if (device->meta_state.itob.img_p_layout) { struct radv_meta_state *state = &device->meta_state;
radv_DestroyPipelineLayout(radv_device_to_handle(device),
device->meta_state.itob.img_p_layout, radv_DestroyPipelineLayout(radv_device_to_handle(device),
&device->meta_state.alloc); state->itob.img_p_layout, &state->alloc);
} radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
if (device->meta_state.itob.img_ds_layout) { state->itob.img_ds_layout,
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), &state->alloc);
device->meta_state.itob.img_ds_layout, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->itob.pipeline, &state->alloc);
}
if (device->meta_state.itob.pipeline) {
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.itob.pipeline,
&device->meta_state.alloc);
}
} }
static nir_shader * static nir_shader *
@@ -410,21 +404,15 @@ fail:
static void static void
radv_device_finish_meta_btoi_state(struct radv_device *device) radv_device_finish_meta_btoi_state(struct radv_device *device)
{ {
if (device->meta_state.btoi.img_p_layout) { struct radv_meta_state *state = &device->meta_state;
radv_DestroyPipelineLayout(radv_device_to_handle(device),
device->meta_state.btoi.img_p_layout, radv_DestroyPipelineLayout(radv_device_to_handle(device),
&device->meta_state.alloc); state->btoi.img_p_layout, &state->alloc);
} radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
if (device->meta_state.btoi.img_ds_layout) { state->btoi.img_ds_layout,
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), &state->alloc);
device->meta_state.btoi.img_ds_layout, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->btoi.pipeline, &state->alloc);
}
if (device->meta_state.btoi.pipeline) {
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.btoi.pipeline,
&device->meta_state.alloc);
}
} }
static nir_shader * static nir_shader *
@@ -602,21 +590,15 @@ fail:
static void static void
radv_device_finish_meta_itoi_state(struct radv_device *device) radv_device_finish_meta_itoi_state(struct radv_device *device)
{ {
if (device->meta_state.itoi.img_p_layout) { struct radv_meta_state *state = &device->meta_state;
radv_DestroyPipelineLayout(radv_device_to_handle(device),
device->meta_state.itoi.img_p_layout, radv_DestroyPipelineLayout(radv_device_to_handle(device),
&device->meta_state.alloc); state->itoi.img_p_layout, &state->alloc);
} radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
if (device->meta_state.itoi.img_ds_layout) { state->itoi.img_ds_layout,
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), &state->alloc);
device->meta_state.itoi.img_ds_layout, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->itoi.pipeline, &state->alloc);
}
if (device->meta_state.itoi.pipeline) {
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.itoi.pipeline,
&device->meta_state.alloc);
}
} }
static nir_shader * static nir_shader *
@@ -749,21 +731,15 @@ fail:
static void static void
radv_device_finish_meta_cleari_state(struct radv_device *device) radv_device_finish_meta_cleari_state(struct radv_device *device)
{ {
if (device->meta_state.cleari.img_p_layout) { struct radv_meta_state *state = &device->meta_state;
radv_DestroyPipelineLayout(radv_device_to_handle(device),
device->meta_state.cleari.img_p_layout, radv_DestroyPipelineLayout(radv_device_to_handle(device),
&device->meta_state.alloc); state->cleari.img_p_layout, &state->alloc);
} radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
if (device->meta_state.cleari.img_ds_layout) { state->cleari.img_ds_layout,
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), &state->alloc);
device->meta_state.cleari.img_ds_layout, radv_DestroyPipeline(radv_device_to_handle(device),
&device->meta_state.alloc); state->cleari.pipeline, &state->alloc);
}
if (device->meta_state.cleari.pipeline) {
radv_DestroyPipeline(radv_device_to_handle(device),
device->meta_state.cleari.pipeline,
&device->meta_state.alloc);
}
} }
void void

12
src/amd/vulkan/radv_meta_clear.c
View File

@@ -296,26 +296,26 @@ radv_device_finish_meta_clear_state(struct radv_device *device)
for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) { for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) {
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
state->clear[i].color_pipelines[j], state->clear[i].color_pipelines[j],
&device->meta_state.alloc); &state->alloc);
radv_DestroyRenderPass(radv_device_to_handle(device), radv_DestroyRenderPass(radv_device_to_handle(device),
state->clear[i].render_pass[j], state->clear[i].render_pass[j],
&device->meta_state.alloc); &state->alloc);
} }
for (uint32_t j = 0; j < NUM_DEPTH_CLEAR_PIPELINES; j++) { for (uint32_t j = 0; j < NUM_DEPTH_CLEAR_PIPELINES; j++) {
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
state->clear[i].depth_only_pipeline[j], state->clear[i].depth_only_pipeline[j],
&device->meta_state.alloc); &state->alloc);
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
state->clear[i].stencil_only_pipeline[j], state->clear[i].stencil_only_pipeline[j],
&device->meta_state.alloc); &state->alloc);
radv_DestroyPipeline(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
state->clear[i].depthstencil_pipeline[j], state->clear[i].depthstencil_pipeline[j],
&device->meta_state.alloc); &state->alloc);
} }
radv_DestroyRenderPass(radv_device_to_handle(device), radv_DestroyRenderPass(radv_device_to_handle(device),
state->clear[i].depthstencil_rp, state->clear[i].depthstencil_rp,
&device->meta_state.alloc); &state->alloc);
} }
radv_DestroyPipelineLayout(radv_device_to_handle(device), radv_DestroyPipelineLayout(radv_device_to_handle(device),
state->clear_color_p_layout, state->clear_color_p_layout,

23
src/amd/vulkan/radv_meta_decompress.c
View File

@@ -207,22 +207,17 @@ void
radv_device_finish_meta_depth_decomp_state(struct radv_device *device) radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
{ {
struct radv_meta_state *state = &device->meta_state; struct radv_meta_state *state = &device->meta_state;
VkDevice device_h = radv_device_to_handle(device);
const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
for (uint32_t i = 0; i < ARRAY_SIZE(state->depth_decomp); ++i) { for (uint32_t i = 0; i < ARRAY_SIZE(state->depth_decomp); ++i) {
VkRenderPass pass_h = state->depth_decomp[i].pass; radv_DestroyRenderPass(radv_device_to_handle(device),
if (pass_h) { state->depth_decomp[i].pass,
radv_DestroyRenderPass(device_h, pass_h, alloc); &state->alloc);
} radv_DestroyPipeline(radv_device_to_handle(device),
VkPipeline pipeline_h = state->depth_decomp[i].decompress_pipeline; state->depth_decomp[i].decompress_pipeline,
if (pipeline_h) { &state->alloc);
radv_DestroyPipeline(device_h, pipeline_h, alloc); radv_DestroyPipeline(radv_device_to_handle(device),
} state->depth_decomp[i].resummarize_pipeline,
pipeline_h = state->depth_decomp[i].resummarize_pipeline; &state->alloc);
if (pipeline_h) {
radv_DestroyPipeline(device_h, pipeline_h, alloc);
}
} }
} }

24
src/amd/vulkan/radv_meta_fast_clear.c
View File

@@ -242,23 +242,15 @@ void
radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device) radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device)
{ {
struct radv_meta_state *state = &device->meta_state; struct radv_meta_state *state = &device->meta_state;
VkDevice device_h = radv_device_to_handle(device);
VkRenderPass pass_h = device->meta_state.fast_clear_flush.pass;
const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
if (pass_h) radv_DestroyRenderPass(radv_device_to_handle(device),
radv_DestroyRenderPass(device_h, pass_h, state->fast_clear_flush.pass, &state->alloc);
&device->meta_state.alloc); radv_DestroyPipeline(radv_device_to_handle(device),
state->fast_clear_flush.cmask_eliminate_pipeline,
VkPipeline pipeline_h = state->fast_clear_flush.cmask_eliminate_pipeline; &state->alloc);
if (pipeline_h) { radv_DestroyPipeline(radv_device_to_handle(device),
radv_DestroyPipeline(device_h, pipeline_h, alloc); state->fast_clear_flush.fmask_decompress_pipeline,
} &state->alloc);
pipeline_h = state->fast_clear_flush.fmask_decompress_pipeline;
if (pipeline_h) {
radv_DestroyPipeline(device_h, pipeline_h, alloc);
}
} }
VkResult VkResult

15
src/amd/vulkan/radv_meta_resolve.c
View File

@@ -219,18 +219,11 @@ void
radv_device_finish_meta_resolve_state(struct radv_device *device) radv_device_finish_meta_resolve_state(struct radv_device *device)
{ {
struct radv_meta_state *state = &device->meta_state; struct radv_meta_state *state = &device->meta_state;
VkDevice device_h = radv_device_to_handle(device);
VkRenderPass pass_h = device->meta_state.resolve.pass;
const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
if (pass_h) radv_DestroyRenderPass(radv_device_to_handle(device),
radv_DestroyRenderPass(device_h, pass_h, state->resolve.pass, &state->alloc);
&device->meta_state.alloc); radv_DestroyPipeline(radv_device_to_handle(device),
state->resolve.pipeline, &state->alloc);
VkPipeline pipeline_h = state->resolve.pipeline;
if (pipeline_h) {
radv_DestroyPipeline(device_h, pipeline_h, alloc);
}
} }
VkResult VkResult