diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 76693a91703..d928e2b4700 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -363,8 +363,8 @@ public: nir_intrinsic_instr *instr); fs_reg get_nir_image_intrinsic_image(const brw::fs_builder &bld, nir_intrinsic_instr *instr); - fs_reg get_nir_ssbo_intrinsic_index(const brw::fs_builder &bld, - nir_intrinsic_instr *instr); + fs_reg get_nir_buffer_intrinsic_index(const brw::fs_builder &bld, + nir_intrinsic_instr *instr); fs_reg swizzle_nir_scratch_addr(const brw::fs_builder &bld, const fs_reg &addr, bool in_dwords); diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index dbdd3938b6b..202bfea48f4 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3954,8 +3954,8 @@ fs_visitor::get_nir_image_intrinsic_image(const brw::fs_builder &bld, } fs_reg -fs_visitor::get_nir_ssbo_intrinsic_index(const brw::fs_builder &bld, - nir_intrinsic_instr *instr) +fs_visitor::get_nir_buffer_intrinsic_index(const brw::fs_builder &bld, + nir_intrinsic_instr *instr) { /* SSBO stores are weird in that their index is in src[1] */ const bool is_store = @@ -4886,8 +4886,10 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr const unsigned bit_size = nir_dest_bit_size(instr->dest); fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; - srcs[SURFACE_LOGICAL_SRC_SURFACE] = - get_nir_ssbo_intrinsic_index(bld, instr); + srcs[get_nir_src_bindless(instr->src[0]) ? + SURFACE_LOGICAL_SRC_SURFACE_HANDLE : + SURFACE_LOGICAL_SRC_SURFACE] = + get_nir_buffer_intrinsic_index(bld, instr); srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]); srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1); srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0); @@ -4923,8 +4925,10 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr const unsigned bit_size = nir_src_bit_size(instr->src[0]); fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; - srcs[SURFACE_LOGICAL_SRC_SURFACE] = - get_nir_ssbo_intrinsic_index(bld, instr); + srcs[get_nir_src_bindless(instr->src[1]) ? + SURFACE_LOGICAL_SRC_SURFACE_HANDLE : + SURFACE_LOGICAL_SRC_SURFACE] = + get_nir_buffer_intrinsic_index(bld, instr); srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[2]); srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1); srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1); @@ -4963,7 +4967,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr const bool is_ssbo = instr->intrinsic == nir_intrinsic_load_ssbo_uniform_block_intel; srcs[SURFACE_LOGICAL_SRC_SURFACE] = is_ssbo ? - get_nir_ssbo_intrinsic_index(bld, instr) : fs_reg(brw_imm_ud(GFX7_BTI_SLM)); + get_nir_buffer_intrinsic_index(bld, instr) : + fs_reg(brw_imm_ud(GFX7_BTI_SLM)); const unsigned total_dwords = ALIGN(instr->num_components, REG_SIZE / 4); unsigned loaded_dwords = 0; @@ -5032,7 +5037,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr case nir_intrinsic_ssbo_atomic: case nir_intrinsic_ssbo_atomic_swap: nir_emit_surface_atomic(bld, instr, - get_nir_ssbo_intrinsic_index(bld, instr)); + get_nir_buffer_intrinsic_index(bld, instr)); break; case nir_intrinsic_get_ssbo_size: { @@ -5697,7 +5702,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; srcs[SURFACE_LOGICAL_SRC_SURFACE] = is_ssbo ? - get_nir_ssbo_intrinsic_index(bld, instr) : fs_reg(brw_imm_ud(GFX7_BTI_SLM)); + get_nir_buffer_intrinsic_index(bld, instr) : + fs_reg(brw_imm_ud(GFX7_BTI_SLM)); srcs[SURFACE_LOGICAL_SRC_ADDRESS] = address; const fs_builder ubld1 = bld.exec_all().group(1, 0); @@ -5739,7 +5745,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; srcs[SURFACE_LOGICAL_SRC_SURFACE] = is_ssbo ? - get_nir_ssbo_intrinsic_index(bld, instr) : fs_reg(brw_imm_ud(GFX7_BTI_SLM)); + get_nir_buffer_intrinsic_index(bld, instr) : + fs_reg(brw_imm_ud(GFX7_BTI_SLM)); srcs[SURFACE_LOGICAL_SRC_ADDRESS] = address; const fs_builder ubld1 = bld.exec_all().group(1, 0); @@ -5967,7 +5974,9 @@ fs_visitor::nir_emit_surface_atomic(const fs_builder &bld, fs_reg dest = get_nir_dest(instr->dest); fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; - srcs[SURFACE_LOGICAL_SRC_SURFACE] = surface; + srcs[get_nir_src_bindless(instr->src[0]) ? + SURFACE_LOGICAL_SRC_SURFACE_HANDLE : + SURFACE_LOGICAL_SRC_SURFACE] = surface; srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1); srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(op); srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1); diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index 766b96a6d8f..45e92a132cc 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -1727,8 +1727,14 @@ lower_lsc_surface_logical_send(const fs_builder &bld, fs_inst *inst) enum lsc_addr_surface_type surf_type; if (surface_handle.file != BAD_FILE) { - assert(surface.file == IMM && (surface.ud == 0 || surface.ud == GFX125_NON_BINDLESS)); - surf_type = non_bindless ? LSC_ADDR_SURFTYPE_SS : LSC_ADDR_SURFTYPE_BSS; + if (surface.file == BAD_FILE) { + assert(!non_bindless); + surf_type = LSC_ADDR_SURFTYPE_BSS; + } else { + assert(surface.file == IMM && + (surface.ud == 0 || surface.ud == GFX125_NON_BINDLESS)); + surf_type = non_bindless ? LSC_ADDR_SURFTYPE_SS : LSC_ADDR_SURFTYPE_BSS; + } } else if (surface.file == IMM && surface.ud == GFX7_BTI_SLM) surf_type = LSC_ADDR_SURFTYPE_FLAT; else