anv: Advertise larger heap sizes
Instead of just advertising the aperture size, we do something more intelligent. On systems with a full 48-bit PPGTT, we can address 100% of the available system RAM from the GPU. In order to keep clients from burning 100% of your available RAM for graphics resources, we have a nice little heuristic (which has received exactly zero tuning) to keep things under a reasonable level of control. Reviewed-by: Kristian H. Kristensen <krh@bitplanet.net>
This commit is contained in:
@@ -25,6 +25,7 @@
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#include <stdbool.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <sys/sysinfo.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <xf86drm.h>
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@@ -53,6 +54,48 @@ compiler_perf_log(void *data, const char *fmt, ...)
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va_end(args);
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}
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static VkResult
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anv_compute_heap_size(int fd, uint64_t *heap_size)
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{
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uint64_t gtt_size;
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if (anv_gem_get_context_param(fd, 0, I915_CONTEXT_PARAM_GTT_SIZE,
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>t_size) == -1) {
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/* If, for whatever reason, we can't actually get the GTT size from the
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* kernel (too old?) fall back to the aperture size.
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*/
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anv_perf_warn("Failed to get I915_CONTEXT_PARAM_GTT_SIZE: %m");
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if (anv_gem_get_aperture(fd, >t_size) == -1) {
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return vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
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"failed to get aperture size: %m");
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}
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}
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/* Query the total ram from the system */
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struct sysinfo info;
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sysinfo(&info);
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uint64_t total_ram = (uint64_t)info.totalram * (uint64_t)info.mem_unit;
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/* We don't want to burn too much ram with the GPU. If the user has 4GiB
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* or less, we use at most half. If they have more than 4GiB, we use 3/4.
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*/
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uint64_t available_ram;
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if (total_ram <= 4ull * 1024ull * 1024ull * 1024ull)
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available_ram = total_ram / 2;
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else
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available_ram = total_ram * 3 / 4;
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/* We also want to leave some padding for things we allocate in the driver,
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* so don't go over 3/4 of the GTT either.
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*/
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uint64_t available_gtt = gtt_size * 3 / 4;
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*heap_size = MIN2(available_ram, available_gtt);
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return VK_SUCCESS;
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}
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static bool
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anv_device_get_cache_uuid(void *uuid)
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{
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@@ -124,12 +167,6 @@ anv_physical_device_init(struct anv_physical_device *device,
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}
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}
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if (anv_gem_get_aperture(fd, &device->aperture_size) == -1) {
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result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
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"failed to get aperture size: %m");
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goto fail;
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}
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if (!anv_gem_get_param(fd, I915_PARAM_HAS_WAIT_TIMEOUT)) {
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result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
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"kernel missing gem wait");
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@@ -151,6 +188,10 @@ anv_physical_device_init(struct anv_physical_device *device,
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device->supports_48bit_addresses = anv_gem_supports_48b_addresses(fd);
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result = anv_compute_heap_size(fd, &device->heap_size);
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if (result != VK_SUCCESS)
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goto fail;
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if (!anv_device_get_cache_uuid(device->uuid)) {
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result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
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"cannot generate UUID");
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@@ -735,12 +776,6 @@ void anv_GetPhysicalDeviceMemoryProperties(
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VkPhysicalDeviceMemoryProperties* pMemoryProperties)
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{
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ANV_FROM_HANDLE(anv_physical_device, physical_device, physicalDevice);
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VkDeviceSize heap_size;
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/* Reserve some wiggle room for the driver by exposing only 75% of the
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* aperture to the heap.
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*/
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heap_size = 3 * physical_device->aperture_size / 4;
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if (physical_device->info.has_llc) {
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/* Big core GPUs share LLC with the CPU and thus one memory type can be
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@@ -777,7 +812,7 @@ void anv_GetPhysicalDeviceMemoryProperties(
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pMemoryProperties->memoryHeapCount = 1;
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pMemoryProperties->memoryHeaps[0] = (VkMemoryHeap) {
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.size = heap_size,
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.size = physical_device->heap_size,
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.flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
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};
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}
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@@ -287,6 +287,22 @@ anv_gem_destroy_context(struct anv_device *device, int context)
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return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy);
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}
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int
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anv_gem_get_context_param(int fd, int context, uint32_t param, uint64_t *value)
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{
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struct drm_i915_gem_context_param gp = {
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.ctx_id = context,
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.param = param,
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};
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int ret = anv_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &gp);
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if (ret == -1)
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return -1;
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*value = gp.value;
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return 0;
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}
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int
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anv_gem_get_aperture(int fd, uint64_t *size)
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{
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@@ -516,7 +516,15 @@ struct anv_physical_device {
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char path[20];
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const char * name;
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struct gen_device_info info;
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uint64_t aperture_size;
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/** Amount of "GPU memory" we want to advertise
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*
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* Clearly, this value is bogus since Intel is a UMA architecture. On
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* gen7 platforms, we are limited by GTT size unless we want to implement
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* fine-grained tracking and GTT splitting. On Broadwell and above we are
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* practically unlimited. However, we will never report more than 3/4 of
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* the total system ram to try and avoid running out of RAM.
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*/
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uint64_t heap_size;
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bool supports_48bit_addresses;
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struct brw_compiler * compiler;
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struct isl_device isl_dev;
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@@ -652,6 +660,8 @@ int anv_gem_set_tiling(struct anv_device *device, uint32_t gem_handle,
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uint32_t stride, uint32_t tiling);
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int anv_gem_create_context(struct anv_device *device);
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int anv_gem_destroy_context(struct anv_device *device, int context);
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int anv_gem_get_context_param(int fd, int context, uint32_t param,
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uint64_t *value);
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int anv_gem_get_param(int fd, uint32_t param);
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bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
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int anv_gem_get_aperture(int fd, uint64_t *size);
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