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ac: change offsets of DMA_DATA dwords to prevent reg offset conflicts

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Use non-multiples of 4.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
This commit is contained in:
Marek Olšák
2023-08-16 15:00:58 -04:00
committed by Marge Bot
parent 8e4ba537a1
commit 05e7bf471c
3 changed files with 14 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/amd/common/ac_debug.c
View File

@@ -491,11 +491,11 @@ static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib,
ac_dump_reg(f, ib->gfx_level, ib->family, R_415_COMMAND, ac_ib_get(ib), ~0);
break;
case PKT3_DMA_DATA:
ac_dump_reg(f, ib->gfx_level, ib->family, R_500_DMA_DATA_WORD0, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_501_SRC_ADDR_LO, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_502_SRC_ADDR_HI, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_503_DST_ADDR_LO, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_504_DST_ADDR_HI, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_501_DMA_DATA_WORD0, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_502_SRC_ADDR_LO, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_503_SRC_ADDR_HI, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_505_DST_ADDR_LO, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_506_DST_ADDR_HI, ac_ib_get(ib), ~0);
ac_dump_reg(f, ib->gfx_level, ib->family, R_415_COMMAND, ac_ib_get(ib), ~0);
break;
case PKT3_INDIRECT_BUFFER_SI:

14
src/amd/registers/pkt3.json
View File

@@ -269,19 +269,19 @@
},
{
"chips": ["gfx6"],
"map": {"at": 1280, "to": "pkt3"},
"map": {"at": 1281, "to": "pkt3"},
"name": "DMA_DATA_WORD0",
"type_ref": "DMA_DATA_WORD0"
},
{
"chips": ["gfx7", "gfx8", "gfx81"],
"map": {"at": 1280, "to": "pkt3"},
"map": {"at": 1281, "to": "pkt3"},
"name": "DMA_DATA_WORD0",
"type_ref": "DMA_DATA_WORD0_cik"
},
{
"chips": ["gfx9", "gfx940", "gfx10", "gfx103", "gfx11"],
"map": {"at": 1280, "to": "pkt3"},
"map": {"at": 1281, "to": "pkt3"},
"name": "DMA_DATA_WORD0",
"type_ref": "DMA_DATA_WORD0_gfx9"
},
@@ -292,7 +292,7 @@
},
{
"chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx940", "gfx10", "gfx103", "gfx11"],
"map": {"at": 1284, "to": "pkt3"},
"map": {"at": 1286, "to": "pkt3"},
"name": "DST_ADDR_HI"
},
{
@@ -302,7 +302,7 @@
},
{
"chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx940", "gfx10", "gfx103", "gfx11"],
"map": {"at": 1283, "to": "pkt3"},
"map": {"at": 1285, "to": "pkt3"},
"name": "DST_ADDR_LO"
},
{
@@ -341,12 +341,12 @@
},
{
"chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx940", "gfx10", "gfx103", "gfx11"],
"map": {"at": 1282, "to": "pkt3"},
"map": {"at": 1283, "to": "pkt3"},
"name": "SRC_ADDR_HI"
},
{
"chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx940", "gfx10", "gfx103", "gfx11"],
"map": {"at": 1281, "to": "pkt3"},
"map": {"at": 1282, "to": "pkt3"},
"name": "SRC_ADDR_LO"
},
{

4
src/gallium/drivers/radeonsi/si_cp_dma.c
View File

@@ -75,7 +75,7 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui
command |= S_415_DAS(V_415_REGISTER) | S_415_DAIC(V_415_NO_INCREMENT);
} else if (sctx->gfx_level >= GFX7 && cache_policy != L2_BYPASS) {
header |=
S_411_DST_SEL(V_411_DST_ADDR_TC_L2) | S_500_DST_CACHE_POLICY(cache_policy == L2_STREAM);
S_501_DST_SEL(V_501_DST_ADDR_TC_L2) | S_501_DST_CACHE_POLICY(cache_policy == L2_STREAM);
}
if (flags & CP_DMA_CLEAR) {
@@ -86,7 +86,7 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui
command |= S_415_SAS(V_415_REGISTER) | S_415_SAIC(V_415_NO_INCREMENT);
} else if (sctx->gfx_level >= GFX7 && cache_policy != L2_BYPASS) {
header |=
S_411_SRC_SEL(V_411_SRC_ADDR_TC_L2) | S_500_SRC_CACHE_POLICY(cache_policy == L2_STREAM);
S_501_SRC_SEL(V_501_SRC_ADDR_TC_L2) | S_501_SRC_CACHE_POLICY(cache_policy == L2_STREAM);
}
radeon_begin(cs);