OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

intel/tools: Handle GT_MODE in the batch decoder

Browse Source 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
This commit is contained in:
Jason Ekstrand
2020-05-11 15:31:57 -05:00
parent b2421f7b44
commit 05e133a84a
2 changed files with 42 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

41
src/intel/common/intel_batch_decoder.c
View File

@@ -253,6 +253,10 @@ dump_binding_table(struct intel_batch_decode_ctx *ctx, uint32_t offset, int coun
return;
}
/* When 256B binding tables are enabled, we have to shift the offset */
if (ctx->use_256B_binding_tables)
offset <<= 3;
if (count < 0) {
count = update_count(ctx, ctx->surface_base + offset,
ctx->surface_base, 1, 8);
@@ -852,6 +856,38 @@ decode_3dstate_slice_table_state_pointers(struct intel_batch_decode_ctx *ctx,
decode_dynamic_state_pointers(ctx, "SLICE_HASH_TABLE", p, 1);
}
static void
handle_gt_mode(struct intel_batch_decode_ctx *ctx,
uint32_t reg_addr, uint32_t val)
{
struct intel_group *reg = intel_spec_find_register(ctx->spec, reg_addr);
struct intel_field_iterator iter;
intel_field_iterator_init(&iter, reg, &val, 0, false);
uint32_t bt_alignment;
bool bt_alignment_mask = 0;
while (intel_field_iterator_next(&iter)) {
if (strcmp(iter.name, "Binding Table Alignment") == 0) {
bt_alignment = iter.raw_value;
} else if (strcmp(iter.name, "Binding Table Alignment Mask") == 0) {
bt_alignment_mask = iter.raw_value;
}
}
if (bt_alignment_mask)
ctx->use_256B_binding_tables = bt_alignment;
}
struct reg_handler {
const char *name;
void (*handler)(struct intel_batch_decode_ctx *ctx,
uint32_t reg_addr, uint32_t val);
} reg_handlers[] = {
{ "GT_MODE", handle_gt_mode }
};
static void
decode_load_register_imm(struct intel_batch_decode_ctx *ctx, const uint32_t *p)
{
@@ -866,6 +902,11 @@ decode_load_register_imm(struct intel_batch_decode_ctx *ctx, const uint32_t *p)
fprintf(ctx->fp, "register %s (0x%x): 0x%x\n",
reg->name, reg->register_offset, p[2]);
ctx_print_group(ctx, reg, reg->register_offset, &p[2]);
for (unsigned i = 0; i < ARRAY_SIZE(reg_handlers); i++) {
if (strcmp(reg->name, reg_handlers[i].name) == 0)
reg_handlers[i].handler(ctx, p[1], p[2]);
}
}
}
}

1
src/intel/common/intel_decoder.h
View File

@@ -240,6 +240,7 @@ struct intel_batch_decode_ctx {
struct intel_spec *spec;
enum intel_batch_decode_flags flags;
bool use_256B_binding_tables;
uint64_t surface_base;
uint64_t dynamic_base;
uint64_t instruction_base;