radv: Always lower indirect derefs after nir_lower_global_vars_to_local.
Otherwise new local variables can cause hangs on vega. CC: <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105098 Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
@@ -1525,9 +1525,16 @@ radv_link_shaders(struct radv_pipeline *pipeline, nir_shader **shaders)
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ordered_shaders[i - 1]);
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if (progress) {
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nir_lower_global_vars_to_local(ordered_shaders[i]);
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if (nir_lower_global_vars_to_local(ordered_shaders[i])) {
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radv_lower_indirect_derefs(ordered_shaders[i],
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pipeline->device->physical_device);
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}
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radv_optimize_nir(ordered_shaders[i]);
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nir_lower_global_vars_to_local(ordered_shaders[i - 1]);
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if (nir_lower_global_vars_to_local(ordered_shaders[i - 1])) {
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radv_lower_indirect_derefs(ordered_shaders[i - 1],
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pipeline->device->physical_device);
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}
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radv_optimize_nir(ordered_shaders[i - 1]);
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}
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}
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@@ -114,6 +114,45 @@ void radv_DestroyShaderModule(
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vk_free2(&device->alloc, pAllocator, module);
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}
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bool
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radv_lower_indirect_derefs(struct nir_shader *nir,
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struct radv_physical_device *device)
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{
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/* While it would be nice not to have this flag, we are constrained
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* by the reality that LLVM 5.0 doesn't have working VGPR indexing
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* on GFX9.
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*/
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bool llvm_has_working_vgpr_indexing =
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device->rad_info.chip_class <= VI;
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/* TODO: Indirect indexing of GS inputs is unimplemented.
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*
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* TCS and TES load inputs directly from LDS or offchip memory, so
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* indirect indexing is trivial.
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*/
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nir_variable_mode indirect_mask = 0;
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if (nir->info.stage == MESA_SHADER_GEOMETRY ||
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(nir->info.stage != MESA_SHADER_TESS_CTRL &&
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nir->info.stage != MESA_SHADER_TESS_EVAL &&
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!llvm_has_working_vgpr_indexing)) {
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indirect_mask |= nir_var_shader_in;
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}
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if (!llvm_has_working_vgpr_indexing &&
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nir->info.stage != MESA_SHADER_TESS_CTRL)
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indirect_mask |= nir_var_shader_out;
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/* TODO: We shouldn't need to do this, however LLVM isn't currently
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* smart enough to handle indirects without causing excess spilling
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* causing the gpu to hang.
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*
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* See the following thread for more details of the problem:
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* https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
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*/
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indirect_mask |= nir_var_local;
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return nir_lower_indirect_derefs(nir, indirect_mask);
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}
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void
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radv_optimize_nir(struct nir_shader *shader)
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{
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@@ -254,40 +293,6 @@ radv_shader_compile_to_nir(struct radv_device *device,
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nir_shader_gather_info(nir, entry_point->impl);
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/* While it would be nice not to have this flag, we are constrained
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* by the reality that LLVM 5.0 doesn't have working VGPR indexing
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* on GFX9.
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*/
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bool llvm_has_working_vgpr_indexing =
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device->physical_device->rad_info.chip_class <= VI;
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/* TODO: Indirect indexing of GS inputs is unimplemented.
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*
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* TCS and TES load inputs directly from LDS or offchip memory, so
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* indirect indexing is trivial.
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*/
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nir_variable_mode indirect_mask = 0;
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if (nir->info.stage == MESA_SHADER_GEOMETRY ||
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(nir->info.stage != MESA_SHADER_TESS_CTRL &&
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nir->info.stage != MESA_SHADER_TESS_EVAL &&
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!llvm_has_working_vgpr_indexing)) {
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indirect_mask |= nir_var_shader_in;
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}
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if (!llvm_has_working_vgpr_indexing &&
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nir->info.stage != MESA_SHADER_TESS_CTRL)
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indirect_mask |= nir_var_shader_out;
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/* TODO: We shouldn't need to do this, however LLVM isn't currently
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* smart enough to handle indirects without causing excess spilling
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* causing the gpu to hang.
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*
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* See the following thread for more details of the problem:
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* https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
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*/
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indirect_mask |= nir_var_local;
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nir_lower_indirect_derefs(nir, indirect_mask);
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static const nir_lower_tex_options tex_options = {
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.lower_txp = ~0,
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};
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@@ -298,6 +303,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
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nir_lower_var_copies(nir);
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nir_lower_global_vars_to_local(nir);
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nir_remove_dead_variables(nir, nir_var_local);
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radv_lower_indirect_derefs(nir, device->physical_device);
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radv_optimize_nir(nir);
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return nir;
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@@ -104,6 +104,10 @@ void
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radv_shader_variant_destroy(struct radv_device *device,
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struct radv_shader_variant *variant);
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bool
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radv_lower_indirect_derefs(struct nir_shader *nir,
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struct radv_physical_device *device);
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const char *
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radv_get_shader_name(struct radv_shader_variant *var, gl_shader_stage stage);
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