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radv: stop setting as_ls for the TCS stage

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This doesn't make sense and it was assigned because the shader info
stuff was a complete mess. LS is only a thing on GFX6-8, on GFX9+
it's a merged VS+TCS to HS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>
This commit is contained in:
Samuel Pitoiset
2022-08-23 15:28:26 +02:00
committed by Marge Bot
parent df997cf47d
commit 0591ff4e5f
2 changed files with 6 additions and 6 deletions
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2
src/amd/vulkan/radv_pipeline.c
View File

@@ -3304,7 +3304,6 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_init(&stages[MESA_SHADER_TESS_CTRL].info);
/* Copy data to merged stage. */
stages[MESA_SHADER_TESS_CTRL].info.vs.as_ls = true;
stages[MESA_SHADER_TESS_CTRL].info.vs.num_linked_outputs =
stages[MESA_SHADER_VERTEX].info.vs.num_linked_outputs;
@@ -3314,6 +3313,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
}
stages[MESA_SHADER_VERTEX].info = stages[MESA_SHADER_TESS_CTRL].info;
stages[MESA_SHADER_VERTEX].info.vs.as_ls = true;
filled_stages |= (1 << MESA_SHADER_VERTEX);
filled_stages |= (1 << MESA_SHADER_TESS_CTRL);

10
src/amd/vulkan/radv_shader_args.c
View File

@@ -300,11 +300,11 @@ declare_vs_specific_input_sgprs(const struct radv_shader_info *info, struct radv
static void
declare_vs_input_vgprs(enum amd_gfx_level gfx_level, const struct radv_shader_info *info,
struct radv_shader_args *args)
struct radv_shader_args *args, bool merged_vs_tcs)
{
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vertex_id);
if (!args->is_gs_copy_shader) {
if (info->vs.as_ls) {
if (info->vs.as_ls || merged_vs_tcs) {
if (gfx_level >= GFX11) {
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user VGPR */
@@ -645,7 +645,7 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
}
declare_vs_input_vgprs(gfx_level, info, args);
declare_vs_input_vgprs(gfx_level, info, args, false);
break;
case MESA_SHADER_TESS_CTRL:
if (has_previous_stage) {
@@ -674,7 +674,7 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_patch_id);
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_rel_ids);
declare_vs_input_vgprs(gfx_level, info, args);
declare_vs_input_vgprs(gfx_level, info, args, true);
} else {
declare_global_input_sgprs(info, &user_sgpr_info, args);
@@ -759,7 +759,7 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[2]);
if (previous_stage == MESA_SHADER_VERTEX) {
declare_vs_input_vgprs(gfx_level, info, args);
declare_vs_input_vgprs(gfx_level, info, args, false);
} else if (previous_stage == MESA_SHADER_TESS_EVAL) {
declare_tes_input_vgprs(args);
} else if (previous_stage == MESA_SHADER_MESH) {