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radv: stop setting as_ls for the TCS stage

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This doesn't make sense and it was assigned because the shader info
stuff was a complete mess. LS is only a thing on GFX6-8, on GFX9+
it's a merged VS+TCS to HS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>
This commit is contained in:
Samuel Pitoiset
2022-08-23 15:28:26 +02:00
committed by Marge Bot
parent df997cf47d
commit 0591ff4e5f
2 changed files with 6 additions and 6 deletions
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2
src/amd/vulkan/radv_pipeline.c
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@@ -3304,7 +3304,6 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_init(&stages[MESA_SHADER_TESS_CTRL].info);
/* Copy data to merged stage. */
stages[MESA_SHADER_TESS_CTRL].info.vs.as_ls = true;
stages[MESA_SHADER_TESS_CTRL].info.vs.num_linked_outputs =
stages[MESA_SHADER_VERTEX].info.vs.num_linked_outputs;
@@ -3314,6 +3313,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
}
stages[MESA_SHADER_VERTEX].info = stages[MESA_SHADER_TESS_CTRL].info;
stages[MESA_SHADER_VERTEX].info.vs.as_ls = true;
filled_stages |= (1 << MESA_SHADER_VERTEX);
filled_stages |= (1 << MESA_SHADER_TESS_CTRL);