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intel/fs: Don't handle texop_tex for shaders without implicit LOD

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These will be lowered by nir_lower_tex() with the
lower_tex_when_implicit_lod_not_supported, so don't need the extra
handling here.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
Caio Marcelo de Oliveira Filho
2019-04-18 21:04:57 -07:00
parent d5ac5d6e83
commit 055f6281d4
2 changed files with 2 additions and 6 deletions
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7
src/intel/compiler/brw_fs_nir.cpp
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@@ -5353,15 +5353,10 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(instr->coord_components); srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(instr->coord_components);
srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(lod_components); srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(lod_components);
bool shader_supports_implicit_lod = stage == MESA_SHADER_FRAGMENT ||
(stage == MESA_SHADER_COMPUTE &&
nir->info.cs.derivative_group != DERIVATIVE_GROUP_NONE);
enum opcode opcode; enum opcode opcode;
switch (instr->op) { switch (instr->op) {
case nir_texop_tex: case nir_texop_tex:
opcode = shader_supports_implicit_lod ? opcode = SHADER_OPCODE_TEX_LOGICAL;
SHADER_OPCODE_TEX_LOGICAL : SHADER_OPCODE_TXL_LOGICAL;
break; break;
case nir_texop_txb: case nir_texop_txb:
opcode = FS_OPCODE_TXB_LOGICAL; opcode = FS_OPCODE_TXB_LOGICAL;

1
src/intel/compiler/brw_nir.c
View File

@@ -693,6 +693,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
.lower_txp = ~0, .lower_txp = ~0,
.lower_txf_offset = true, .lower_txf_offset = true,
.lower_rect_offset = true, .lower_rect_offset = true,
.lower_tex_without_implicit_lod = true,
.lower_txd_cube_map = true, .lower_txd_cube_map = true,
.lower_txb_shadow_clamp = true, .lower_txb_shadow_clamp = true,
.lower_txd_shadow_clamp = true, .lower_txd_shadow_clamp = true,