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intel/dev: Drop writeback_incoherent from Xe2

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Xe2 platforms are only supported by Xe KMD that do not support
CPU WB + 0 way coherent.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950>
This commit is contained in:
José Roberto de Souza
2024-06-27 14:18:49 -07:00
committed by Marge Bot
parent 6d77dfa75d
commit 0500e35165
1 changed files with 0 additions and 2 deletions
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src/intel/dev/intel_device_info.c
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@@ -1234,8 +1234,6 @@ static const struct intel_device_info intel_device_info_arl_h = {
.cached_coherent = PAT_ENTRY(1, WB), \
/* CPU: WC, GPU: PAT 6 => XD */ \
.scanout = PAT_ENTRY(6, WC), \
/* CPU: WB, GPU: PAT 0 => WB, 0WAY */ \
.writeback_incoherent = PAT_ENTRY(0, WB), \
/* CPU: WC, GPU: PAT 0 => WB */ \
.writecombining = PAT_ENTRY(0, WC), \
/* CPU: WC, GPU: PAT 11 => XD, compressed */ \